General-purpose I/Os (GPIO) RM0453
418/1450 RM0453 Rev 5
10.4.16 GPIOC input data register (GPIOC_IDR)
Address offset: 0x0810
Reset value: 0x0000 XXXX
10.4.17 GPIOC output data register (GPIOC_ODR)
Address offset: 0x0814
Reset value: 0x0000 0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
1514131211109876543210
ID15 ID14 ID13 Res. Res. Res. Res. Res. Res. ID6 ID5 ID4 ID3 ID2 ID1 ID0
rrr rrrrrrr
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:13 IDy: Port PCy input data bit (y = 15 to 13)
These bits are read-only. They contain the input value of the corresponding I/O port.
Bits 12:7 Reserved, must be kept at reset value.
Bits 6:0 IDy: Port PCy input data bit (y = 6 to 0)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
1514131211109876543210
OD15 OD14 OD13 Res. Res. Res. Res. Res. Res. OD6 OD5 OD4 OD3 OD2 OD1 OD0
rw rw rw rw rw rw rw rw rw rw
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:13 ODy: Port PCy output data bit (y = 15 to 13)
These bits can be read and written by software.
Note: For atomic bit set/reset, OD bits can be individually set and/or reset by writing to the
GPIOC_BSRR and GPIOC_BRR registers.
Bits 12:7 Reserved, must be kept at reset value.
Bits 6:0 ODy: Port PCy output data bit (y = 6 to 0)
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