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STMicroelectronics STM32WL5 Series User Manual

STMicroelectronics STM32WL5 Series
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Nested vectored interrupt controller (NVIC) RM0453
502/1450 RM0453 Rev 5
27 34 Settable TIM2 Timer 2 global interrupt 0x0000 00AC
28 35 Settable TIM16 Timer 16 global interrupt 0x0000 00B0
29 36 Settable TIM17 Timer 17 global interrupt 0x0000 00B4
30 37 Settable I2C1_EV I2C1 event interrupt 0x0000 00B8
31 38 Settable I2C1_ER I2C1 error interrupt 0x0000 00BC
32 39 Settable I2C2_EV I2C2 event interrupt 0x0000 00C0
33 40 Settable I2C2_ER I2C2 error interrupt 0x0000 00C4
34 41 Settable SPI1 SPI1 global interrupt 0x0000 00C8
35 42 Settable SPI2S2 SPI2S2 global interrupt 0x0000 00CC
36 43 Settable USART1 USART1 global interrupt 0x0000 00D0
37 44 Settable USART2 USART2 global interrupt 0x0000 00D4
38 45 Settable LPUART1 LPUART1 global interrupt 0x0000 00D8
39 46 Settable LPTIM1 LP timer 1 global interrupt 0x0000 00DC
40 47 Settable LPTIM2 LP timer 2 global interrupt 0x0000 00E0
41 48 Settable EXTI[15:10]
EXTI line [15:10] interrupt through EXTI[15:10]
(IMR1[31:26])
0x0000 00E4
42 49 Settable RTC_ALARM RTC alarms A and B interrupt 0x0000 00E8
43 50 Settable LPTIM3 LP timer 3 global interrupt 0x0000 00EC
44 51 Settable Reserved Reserved 0x0000 00F0
45 52 Settable IPCC_C1_RX_IT IPCC CPU1 RX occupied interrupt 0x0000 00F4
46 53 Settable IPCC_C1_TX_IT IPCC CPU1 TX free interrupt 0x0000 00F8
47 54 Settable HSEM Semaphore interrupt 0 to CPU1 0x0000 00FC
48 55 Settable I2C3_EV I2C3 event interrupt 0x0000 0100
49 56 Settable I2C3_ER I2C3 error interrupt 0x0000 0104
50 57 Settable
Radio IRQ,
Busy
Radio IRQs
RFBUSY interrupt through EXTI[45]
0x0000 0108
51 58 Settable AES AES global interrupt 0x0000 010C
52 59 Settable True RNG True random number generator interrupt 0x0000 0110
53 60 Settable PKA Private key accelerator interrupt 0x0000 0114
54 61 Settable DMA2_CH1 DMA2 channel 1 non-secure interrupt 0x0000 0118
55 62 Settable DMA2_CH2 DMA2 channel 2 non-secure interrupt 0x0000 011C
56 63 Settable DMA2_CH3 DMA2 channel 3 non-secure interrupt 0x0000 0120
57 64 Settable DMA2_CH4 DMA2 channel 4 non-secure interrupt 0x0000 0124
58 65 Settable DMA2_CH5 DMA2 channel 5 non-secure interrupt 0x0000 0128
Table 89. CPU1 vector table (continued)
Position
Priority
Type of
priority
Acronym Description
(1)(2)
Address

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STMicroelectronics STM32WL5 Series Specifications

General IconGeneral
BrandSTMicroelectronics
ModelSTM32WL5 Series
CategoryMicrocontrollers
LanguageEnglish

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