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STMicroelectronics STM32WL5 Series User Manual

STMicroelectronics STM32WL5 Series
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RM0453 Rev 5 983/1450
RM0453 System window watchdog (WWDG)
988
31 System window watchdog (WWDG)
31.1 Introduction
The system window watchdog (WWDG) is used to detect the occurrence of a software fault,
usually generated by external interference or by unforeseen logical conditions, which
causes the application program to abandon its normal sequence.
The watchdog circuit generates an MCU reset on expiry of a programmed time period,
unless the program refreshes the contents of the down-counter before the T6 bit is cleared.
An MCU reset is also generated if the 7-bit down-counter value (in the control register) is
refreshed before the down-counter reaches the window register value. This implies that the
counter must be refreshed in a limited window.
The WWDG clock is prescaled from the APB clock and has a configurable time-window that
can be programmed to detect abnormally late or early application behavior. The WWDG is
only clocked when CPU1 is in CRun or CSleep mode.
The WWDG is best suited for applications requiring the watchdog to react within an
accurate timing window.
31.2 WWDG main features
Programmable free-running down-counter
Conditional reset
Reset (if watchdog activated) when the down-counter value becomes lower than
0x40
Reset (if watchdog activated) if the down-counter is reloaded outside the window
(see Figure 273)
Early wake-up interrupt (EWI): triggered (if enabled and the watchdog activated) when
the down-counter is equal to 0x40
31.3 WWDG functional description
If the watchdog is activated (the WDGA bit is set in the WWDG_CR register), and when the
7-bit down-counter (T[6:0] bits) is decremented from 0x40 to 0x3F (T6 becomes cleared), it
initiates a reset. If the software reloads the counter while the counter is greater than the
value stored in the window register, then a reset is generated.
The application program must write in the WWDG_CR register at regular intervals during
normal operation to prevent an MCU reset. This operation can take place only when the
counter value is lower than or equal to the window register value, and higher than 0x3F. The
value to be stored in the WWDG_CR register must be between 0xFF and 0xC0.
Refer to Figure 272 for the WWDG block diagram.

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STMicroelectronics STM32WL5 Series Specifications

General IconGeneral
BrandSTMicroelectronics
ModelSTM32WL5 Series
CategoryMicrocontrollers
LanguageEnglish

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