Model 2601B-PULSE System SourceMeter Instrument Reference Manual Section 11: TSP command reference
2601B-PULSE-901-01A April 2020 11-301
Example
status.operation.instrument.trigger_blender.trigger_overrun.enable
= status.operation.instrument.trigger_blender.trigger_overrun.BLND1
Uses the constant to set the bit for blender 1 of the operation status trigger blender overrun enable register.
Example
status.operation.instrument.trigger_blender.trigger_overrun.enable = 18
Uses the decimal value to set the bits for blenders 1 and 4 of the operation status trigger blender overrun
enable register.
Also see
Operation Status Registers (on page 15-8)
status.operation.instrument.trigger_blender.* (on page 11-298)
status.operation.instrument.trigger_timer.*
This attribute contains the operation status trigger timer summary register set.
Usage
operationRegister = status.operation.instrument.trigger_timer.condition
operationRegister = status.operation.instrument.trigger_timer.enable
operationRegister = status.operation.instrument.trigger_timer.event
operationRegister = status.operation.instrument.trigger_timer.ntr
operationRegister = status.operation.instrument.trigger_timer.ptr
status.operation.instrument.trigger_timer.enable = operationRegister
status.operation.instrument.trigger_timer.ntr = operationRegister
status.operation.instrument.trigger_timer.ptr = operationRegister
The status of the operation status trigger timer summary register; a zero (0)
indicates no bits set (also send 0 to clear all bits); the only valid value other than 0
is 1024
Details
These attributes are used to read or write to the operation status trigger timer summary registers.
Reading a status register returns a value. The binary equivalent of the returned value indicates which
register bits are set. The least significant bit of the binary number is bit B0, and the most significant bit
is bit B15.
For information about .condition, .enable, .event, .ntr, and .ptr registers, refer to Status register set
contents (on page 15-1) and Enable and transition registers (on page 15-19). The individual bits of
this register are defined in the following table.