Terminal Signal Description
12 I3- Negative pole of input signal 3
13 --- Reserved
14 --- Reserved
15 --- Reserved
16 --- Reserved
17 --- Reserved
18 SG Shield grounding
19 L+ Process voltage L+ (24 V DC)
20 M Process voltage M (0 V DC)
The internal power supply voltage for the module's circuitry is carried out via the I/O bus
(provided by a communication interface module or a CPU). Thus, the current consumption from
24 V DC power supply at the terminals L+/UP and M/ZP of the CPU/communication interface
module increases by 10 mA per AI561.
The external power supply connection is carried out via the L+ (+24 V DC) and the M (0 V DC)
terminals. The M terminal is interconnected to the M/ZP terminal of the CPU/communication
interface module.
NOTICE!
Risk of imprecise and faulty measurements!
Analog signals may be distorted seriously by external electromagnetic influ-
ences.
Use shielded wires when wiring analog signal sources. The cable shield must
be grounded at both ends of the cable. Provide a potential equalisation of a
low resistance to avoid high potential differences between different parts of the
plant.
NOTICE!
Risk of damaging the PLC modules!
The PLC modules must not be removed while the plant is connected to a power
supply.
Make sure that all voltage sources (supply and process voltage) are switched
off before you
– connect or disconnect any signal or terminal block
– remove or replace a module.
NOTICE!
Risk of damaging the PLC modules!
Overvoltages and short circuits might damage the PLC modules.
– Make sure that all voltage sources (supply voltage and process supply
voltage) are switched off before you begin with operations on the system.
– Never connect any voltages or signals to reserved terminals (marked with
---). Reserved terminals may carry internal voltages.
The module provides several diagnosis functions
Ä
Chapter 1.6.2.1.1.6 “Diagnosis”
on page 356.
The following figure is an example of the internal construction of the analog input AI0. The
analog inputs AI1...AI3 are designed in the same way.
I/O modules > Analog I/O modules
2022/01/31 3ADR010278, 3, en_US 353
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