RM0453 Rev 5 1401/1450
RM0453 Debug support (DBG)
1435
38.11.11 TPIU device type identifier register (TPIU_DEVTYPER)
Address offset: 0xFCC
Reset value: 0x0000 0011
38.11.12 TPIU CoreSight peripheral identity register 4 (TPIU_PIDR4)
Address offset: 0xFD0
Reset value: 0x0000 0004
Bits 8:6 FIFOSIZE[2:0]: FIFO size in powers of two
0x2: FIFO size = 4 bytes
Bit 5 CLKRELAT: indicates relationship between ATB clock and TRACECLKIN
0: Synchronous
1: Asynchronous
Bits 4:0 MAXNUM[4:0]: number/type of ATB input port multiplexing
0x0: one input port
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
1514131211109876543210
Res. Res. Res. Res. Res. Res. Res. Res. SUBTYPE[3:0] MAJORTYPE[3:0]
rrrrrrrr
Bits 31:8 Reserved, must be kept at reset value.
Bits 7:4 SUBTYPE[3:0]: sub-classification
0x1: trace port component
Bits 3:0 MAJORTYPE[3:0]: major classification
0x1: trace sink component
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
1514131211109876543210
Res. Res. Res. Res. Res. Res. Res. Res. F4KCOUNT[3:0] JEP106CON[3:0]
rrrrrrrr
Bits 31:8 Reserved, must be kept at reset value.
Bits 7:4 F4KCOUNT[3:0]: register file size
0x0: Register file occupies a single 4-Kbyte region.
Bits 3:0 JEP106CON[3:0]: JEP106 continuation code
0x4: Arm
®
JEDEC code
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