AMD K5

Dispatch and Execution Timing 4-11
18524C/0—Nov1996 AMD-K5 Processor Technical Reference Manual
IMUL reg, reg, imm 0_0x_011010x1_xxx_xxx F
fpfill 1/1/4
fmul 1/1/4
IMUL AX, AL, mem 0_1x_11110110_101_xxx F
ld 1/1
fpfill 1/2/4
fmul 1/2/4
IMUL EDX:EAX, EAX, mem 0_1x_11110111_101_xxx F
ld 1/1
fpfill 1/2/4
fmul 1/2/4
IMUL reg, mem 1_1x_10101111_xxx_xxx F
ld 1/1
fpfill 1/2/4
fmul 1/2/4
IMUL reg, reg, mem 0_1x_011010x1_xxx_xxx F
ld 1/1
fpfill 1/2/4
fmul 1/2/4
INC reg 0_xx_01000xxx_xxx_xxx Falu1/1
INC reg 0_0x_1111111x_000_xxx Falu1/1
INC mem 0_1x_1111111x_000_xxx F
ld 1/1
alu 1/2
st 1/1/3
Jcc short displacement 0_xx_0111xxxx_xxx_xxx Fbrn1/1
Jcc long displacement 1_xx_1000xxxx_xxx_xxx Fbrn1/1
JCXZ short displacement 0_xx_11100011_xxx_xxx Fbrn1/1
JMP long displacement 0_xx_11101001_xxx_xxx Fbrn1/1
JMP short displacement 0_xx_11101011_xxx_xxx Fbrn1/1
JMP reg 0_0x_11111111_100_xxx Fbrn1/1
JMP mem 0_1x_11111111_100_xxx F
ld 1/1
brn 1/2
LEA 0_1x_10001101_xxx_xxx Fld1/1
LOOP short displacement 0_xx_11100010_xxx_xxx F
alu 1/1
brn 1/2
LOOPE short displacement 0_xx_11100001_xxx_xxx M
alu 1/1
brn 1/2
LOOPNE short displacement 0_xx_11100000_xxx_xxx M
alu 1/1
brn 1/2
LODS AL/AX/EAX, mem 0_xx_1010101x_xxx_xxx F
ld 1/1
alu 1/1
MOV reg, reg 0_0x_100010xx_xxx_xxx Falu1/1
Table 4-1. Integer Instructions (continued)
Instruction Mnemonic Opcode Format
Fastpath or
Microcode
Execution
Unit Timing