4-12 Performance
AMD-K5 Processor Technical Reference Manual 18524C/0—Nov1996
MOV reg, mem 0_1x_1000101x_xxx_xxx Fld1/1
MOV mem, reg 0_10_1000100x_xxx_xxx Fst1/1
MOV mem, reg
(base + index addressing)
0_11_1000100x_xxx_xxx F
ld 1/1
st 1/2/3
MOV AL/AX/EAX, mem 0_xx_1010000x_xxx_xxx Fld1/1
MOV mem, AL/AX/EAX 0_xx_1010001x_xxx_xxx Fst1/1
MOV reg, imm 0_0x_1100011x_000_xxx Falu1/1
MOV reg, imm 0_xx_1011xxxx_xxx_xxx Falu1/1
MOV mem, imm 0_10_1100011x_000_xxx F
alu 1/1
st 1/1
MOV mem, imm
(base + index addressing)
0_11_1100011x_000_xxx F
alu 1/1
ld 1/1
st 1/2/3
MOVSX reg, reg 1_0x_1011111x_xxx_xxx Falu11/1
MOVSX reg, mem 1_1x_1011111x_xxx_xxx F
ld 1/1
alu1 1/2
MOVZX reg, reg 1_0x_1011011x_xxx_xxx Falu1/1
MOVZX reg, mem 1_1x_1011011x_xxx_xxx F
ld 1/1
alu 1/2
MUL AX, AL, reg 0_0x_11110110_100_xxx F
fpfill 1/1/4
fmul 1/1/4
MUL EDX:EAX, EAX, reg 0_0x_11110111_100_xxx F
fpfill 1/1/4
fmul 1/1/4
MUL AX, AL, mem 0_1x_11110110_100_xxx F
ld 1/1
fpfill 1/2/4
fmul 1/2/4
MUL EDX:EAX, EAX, mem 0_1x_11110111_100_xxx F
ld 1/1
fpfill 1/2/4
fmul 1/2/4
NEG reg 0_0x_1111011x_011_xxx Falu1/1
NEG mem 0_1x_1111011x_011_xxx F
ld 1/1
alu 1/2
st 1/1/3
NOP (XCHG EAX, EAX) 0_xx_10010000_xxx_xxx Falu1/1
NOT reg 0_0x_1111011x_010_xxx Falu1/1
Table 4-1. Integer Instructions (continued)
Instruction Mnemonic Opcode Format
Fastpath or
Microcode
Execution
Unit Timing