Freescale Semiconductor MPC5553 - Enabling Nexus3 Operation

MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
25-28 Freescale Semiconductor
• Data trace via data write messaging (DWM) and data read messaging (DRM). This provides the
capability for the development tool to trace reads and/or writes to selected internal memory
resources.
• Ownership trace via ownership trace messaging (OTM). OTM facilitates ownership trace by
providing visibility of which process ID or operating system task is activated. An ownership trace
message is transmitted when a new process/task is activated, allowing the development tool to
trace ownership flow.
• Run-time access to embedded processor registers and memory map via the JTAG port. This allows
for enhanced download/upload capabilities.
• Watchpoint messaging via the auxiliary pins.
• Watchpoint trigger enable of program and/or data trace messaging.
• Higher speed data input/output via the auxiliary port.
• Registers for program trace, data trace, ownership trace and watchpoint trigger.
• All features controllable and configurable via the JTAG port.
25.10.5 Enabling Nexus3 Operation
The Nexus module is enabled by loading a single instruction (ACCESS_AUX_TAP_ONCE, as shown in
Table 25-4) into the JTAGC instruction register (IR), and then loading the corresponding OnCE OCMD
register with the NEXUS3_ACCESS instruction (refer to Table 25-5). For the e200z6 Class 3 Nexus
module, the OCMD value is 0b00_0111_1100. After it is enabled, the module will be ready to accept
control input via the JTAG pins. See Section 25.4.1, “Enabling Nexus Clients for TAP Access” for more
information.
The Nexus module is disabled when the JTAG state machine reaches the test-logic-reset state. This state
can be reached by the assertion of the JCOMP pin or by cycling through the state machine using the TMS
pin. The Nexus module will also be disabled if a power-on-reset (POR) event occurs. If the Nexus3 module
is disabled, no trace output will be provided, and the module will disable (drive inactive) auxiliary port
output pins MDO[n:0], MSEO[1:0], MCKO. Nexus registers will not be available for reads or writes.
25.10.6 TCODEs Supported by NZ63C
The Nexus3 pins allow for flexible transfer operations via public messages. A TCODE defines the transfer
format, the number and/or size of the packets to be transferred, and the purpose of each packet. The
IEEE-ISTO 5001-2003 standard defines a set of public messages. The NZ6C3 module supports the
public TCODEs seen in Table 25-19. Each message contains multiple packets transmitted in the order
shown in the table.
Table 25-19. Public TCODEs Supported by NZ63C
Message Name
Packet Size
(bits) Packet
Name
Packet
Type
Packet Description
Min Max
Debug Status 6 6 TCODE Fixed TCODE number = 0 (0x00)
4 4 SRC Fixed source processor identifier
8 8 STATUS Fixed Debug status register (DS[31:24])