MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
16-2 Freescale Semiconductor
• Serial boot by loading user program via CAN bus or eSCI to the internal SRAM
• Censorship protection for internal flash module
• An option to enable the e200z6 core watchdog timer
• An option to configure the external data bus to 16- or 32-bits wide (416 PBGA package only)
16.1.4 Modes of Operation
16.1.4.1 Normal Mode
In normal operation the BAM responds to all read requests within its address space. The BAM program is
executed following the negation of reset.
16.1.4.2 Debug Mode
The BAM program is not executed when the MCU comes out of reset in OnCE debug mode. The user
should provide the required MCU initialization using the development tool before accessing the MCU
resources.
16.1.4.3 Internal Boot Mode
This mode of operation is intended for systems that boot from internal flash memory. The internal flash is
used for all code and all boot configuration data. After the BAM program has completed the boot process,
user code may enable the external bus interface if required.
16.1.4.4 External Boot Modes
This mode of operation is intended for systems that have user code and configuration information in an
external memory device connected to the external bus. The bus arbitration can be enabled to allow a boot
option for multiprocessor systems.
Note that external boot mode should not be chosen for devices that do not have an external bus.
16.1.4.5 Serial Boot Mode
This mode of operation is intended to load a user program into internal SRAM using either the eSCI or
CAN serial interface, then to execute that program. The program can then be used to control the download
of data and erasing/programming of the internal or external flash memory.
16.2 Memory Map/Register Definition
The BAM occupies 16 Kbytes of memory space, 0xFFFF_C000 to 0xFFFF_FFFF. The actual code size of
the BAM program is less than 4 Kbytes and starts at 0xFFFF_F000, repeating itself down every 4 Kbytes
in the BAM address space. The CPU starts the BAM program execution at its reset vector from address
0xFFFF_FFFC. Table 16-1 shows the BAM address map.
Table 16-1. BAM Memory Map
Address Description
0xFFFF_C000–
0xFFFF_CFFF
BAM Program Mirrored
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