Freescale Semiconductor MPC5553 - Register Descriptions

MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
Freescale Semiconductor 22-9
22.3.3 Register Descriptions
The FlexCAN2 registers are described in this section. Note that there are three (or two in the MPC5553)
separate, identical FlexCAN2 modules. Each register in the following sections is denoted with an ‘x’ that
represents the specified module, A, B, or C.
22.3.3.1 Module Configuration Register (CANx_MCR)
CANx_MCR defines global system configurations, such as the module operation mode and maximum
message buffer configuration. Most of the fields in this register can be accessed at any time, except the
MAXMB field, which should only be changed while the module is in freeze mode.
0 1010 1010 Transmit a data frame whenever a remote request frame with the
same ID is received. This MB participates simultaneously in both the
matching and arbitration processes. The matching process
compares the ID of the incoming remote request frame with the ID of
the MB. If a match occurs this MB is allowed to participate in the
current arbitration process and the CODE field is automatically
updated to ‘1110’ to allow the MB to participate in future arbitration
runs. When the frame is eventually transmitted successfully, the
Code automatically returns to ‘1010’ to restart the process again.
0 1110 1010 the MBM as a result of match to a remote request frame. The data
frame will be transmitted unconditionally once and then the code will
automatically return to ‘1010’. The CPU can also write this code with
the same effect.
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R MDIS FRZ 0 HALT NOT
RDY
0SOFT
RST
FRZ
ACK
100MDIS
ACK
0000
W
Reset010110 0 1100 00000
Reg Addr Base + 0x0000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R000000 0 000 MAXMB
W
Reset000000 0 0000 01111
Reg Addr Base + 0x0000
Figure 22-3. Module Configuration Register (CANx_MCR)
Table 22-6. Message Buffer Code for TX buffers (Continued)
RTR
Initial TX
Code
Code after
Successful
Transmission
Description