MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
22-8 Freescale Semiconductor
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0010 FULL: MB is full.
0010 The act of reading the C/S word followed by
unlocking the MB does not make the code return to
EMPTY. It remains FULL. If a new frame is written to
the MB after the C/S word was read and the MB was
unlocked, the code still remains FULL.
0110 If the MB is FULL and a new frame is overwritten to
this MB before the CPU had time to read it, the code
is automatically updated to OVERRUN. Refer to
Section 22.4.3.1, “Matching Process for details
about overrun behavior.
0110
OVERRUN: A frame was
overwritten into a full buffer.
0010 If the code indicates OVERRUN but the CPU reads
the C/S word and then unlocks the MB, when a new
frame is written to the MB the code returns to FULL.
0110 If the code already indicates OVERRUN, and yet
another new frame must be written, the MB will be
overwritten again, and the code will remain
OVERRUN. Refer to Section 22.4.3.1, “Matching
Process for details about overrun behavior.
0XY1
1
BUSY: FlexCAN is updating the
contents of the MB. The CPU
must not access the MB.
0010 An EMPTY buffer was written with a new frame (XY
was 01).
0110 A FULL/OVERRUN buffer was overwritten (XY was
11).
1
Note that for TX MBs (see Table 2 2-6 ), the BUSY bit should be ignored upon read.
Table 22-6. Message Buffer Code for TX buffers
RTR
Initial TX
Code
Code after
Successful
Transmission
Description
X 1000 — INACTIVE: MB does not participate in the arbitration process.
0 1100 1000 Transmit data frame unconditionally once. After transmission, the MB
automatically returns to the INACTIVE state.
1 1100 0100 Transmit remote frame unconditionally once. After transmission, the
MB automatically becomes and RX MB with the same ID.
Table 22-5. Message Buffer Code for RX buffers (Continued)
RX Code before
RX New Frame
Description
RX Code after
RX New Frame
Comment
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