Freescale Semiconductor MPC5553 - Introduction

MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
Freescale Semiconductor 4-1
Chapter 4
Reset
4.1 Introduction
The following reset sources are supported in the MPC5553/MPC5554 MCU:
• Power-on reset
• External reset
• Loss-of-lock reset
• Loss-of-clock reset
• Watchdog timer/debug reset
• JTAG reset
• Checkstop reset
• Software system reset
• Software external reset
All reset sources are processed by the reset controller, which is located in the SIU module. The reset
controller monitors the reset input sources, and upon detection of a reset event, resets internal logic and
controls the assertion of the RSTOUT pin. The RSTOUT signal may be automatically asserted by writing
the SER bit in the SIU_SRCR to 1. The RSTOUT signal will stay asserted for a number of system clocks
1
determined by the configuration of the PLL (See Section 4.2.2, “Reset Output (RSTOUT)”). This does not
reset the MPC5553/MPC5554 MCU. All other reset sources initiate an internal reset of the MCU.
For all reset sources, the BOOTCFG[0:1] and PLLCFG[0:1] signals can be used to determine the boot
mode and the configuration of the FMPLL, respectively. If the RSTCFG pin is asserted during reset, the
values on the BOOTCFG[0:1] pins are latched in the SIU_RSR 4 clock cycles prior to the negation of the
RSTOUT pin, determining the boot mode. The values on the PLLCFG[0:1] pins are latched at the negation
of the RSTOUT pin, determining the configuration of the FMPLL. If the RSTCFG pin is negated during
reset, the FMPLL defaults to normal operation (PLL enabled) with a crystal reference and the boot mode
(latched in the SIU_RSR) is defaulted to internal boot from flash.
The reset status register (SIU_RSR) gives the source of the last reset and indicates whether a glitch has
occurred on the RESET
pin. The SIU_RSR is updated for all reset sources.
All reset sources initiate execution of the MPC5553/MPC5554 boot assist module (BAM) program with
the exception of the software external reset.
The reset configuration halfword (RCHW) provides several basic functions at reset. It provides a means
to locate the boot code, determines if flash memory is programmed or erased, enables or disables the
watchdog timer, and if booting externally, sets the bus size. The location of the RCHW is specified by the
state of the BOOTCFG[0:1] pins. These pins determine whether the RCHW is located in internal flash,
located in external memory, or whether a serial or CAN boot is configured. A complete description of the
BOOTCFG[0:1] pins may be found in Chapter 2, “Signal Description.” The BAM program reads the
values of the BOOTCFG[0:1] pins from the BOOTCFG field of the SIU_RSR, then reads the RCHW from
1. Unless noted otherwise, the use of ‘clock’ or ‘clocks’ in this section is a reference to the system clock.