Freescale Semiconductor MPC5553 - Ethernet Transmit Buffer Descriptor (Txbd)

MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
Freescale Semiconductor 14-51
NOTE
Whenever the software driver sets an E bit in one or more receive
descriptors, the driver should follow that with a write to RDAR.
14.5.3 Ethernet Transmit Buffer Descriptor (TxBD)
Data is presented to the FEC for transmission by arranging it in buffers referenced by the channel’s TxBDs.
The Ethernet controller confirms transmission by clearing the ready bit (R bit) when DMA of the buffer is
complete. In the TxBD the user initializes the R, W, L, and TC bits and the length (in bytes) in the first
word, and the buffer pointer in the second word.
The FEC will set the R bit = 0 in the first word of the BD when the buffer has been DMA’d. Status bits for
the buffer/frame are not included in the transmit buffer descriptors. Transmit frame status is indicated via
individual interrupt bits (error conditions) and in statistic counters in the MIB block. See Section 14.3.3,
“MIB Block Counters Memory Map” for more details.
.
0 1 2 3456 7 8 91011121314 15
Offset + 0 R TO1 W TO2 L TC ABC — — — — — — — — —
Offset + 2 Data Length
Offset + 4 Tx Data Buffer Pointer - A [0:15]
Offset + 6 Tx Data Buffer Pointer - A [16:31]
Figure 14-29. Transmit Buffer Descriptor (TxBD)
Table 14-38. Transmit Buffer Descriptor Field Definitions
Halfword Location Field Name Description
Offset + 0 Bit 0 R Ready. Written by the FEC and the user.
0 The data buffer associated with this BD is not ready for
transmission. The user is free to manipulate this BD or its
associated data buffer. The FEC clears this bit after the
buffer has been transmitted or after an error condition is
encountered.
1 The data buffer, which has been prepared for transmission
by the user, has not been transmitted or is currently being
transmitted. No fields of this BD may be written by the user
after this bit is set.
Offset + 0 Bit 1 TO1 Transmit software ownership. This field is reserved for software
use. This read/write bit will not be modified by hardware, nor
will its value affect hardware.
Offset + 0 Bit 2 W Wrap. Written by user.
0 The next buffer descriptor is found in the consecutive
location
1 The next buffer descriptor is found at the location defined in
ETDSR.