System Interface Unit (SIU)
MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
6-112 Freescale Semiconductor
6.5 Revision History
Table 6-54. Changes to MPC5553/5554 RM for Rev. 4.0 Release
Description of Change
• Added the word ‘internal’ to the note in the Reset Output (RSTOUT) signal description, to read ‘During an internal
power-on-reset (POR)’ RSTOUT
is tri-stated.
• Added Ta bl e 6 -2 in the BOOTCFG[0:1] Configuration section that lists the values on the BOOTCFG[0:1] pins.
• Added overbars to IRQ signals and put [ ] around the variable n in text.
• Ta ble 6 -4 SIU_MIDR Field Descriptions. Removed reference to the Signals chapter
• 6.1.3 Features: under External Interrupts bullet, changed 16 IRQs to:
16 external interrupt requests, IRQ
[0:15], for the MPC5554
15 external interrupt requests, IRQ[0:5, 7:15], for the MPC5553.
• Added footnote to Table 6 -1 BOOTCFG[0] is not available on the 208 package.
• Added a footnote to Figure 6-3 that the 416 CSP refers to the reset values for 496 pin assembly.
• Added 416 package information to Figure 6-3 for MPC5554. Added a footnote to the 416 CSP reset rows that the reset
values pertain to the 496 assembly.
• Changed LSB bits for the PA field from 5:0 to 5:3 in Tab le 6 -1 6.
• Added key on how to understand the register format in Section 6.3.1.
• Rewrote introduction to the PCR registers in Section 6.3.1.12 for clarity.
• Added the following PA field definition tables: Tabl e 6 -17 through Tabl e 6- 44 .
• Figure 6-6: Added w1c (write 1 to clear) to bits 16 through 31 SIU_EISR (external interrupt register.
• Standardized all similar footnotes and changed passive voice to active voice.
• Ta ble 6 -50 . Added column to SIU_DSIR for the signals that do not apply to the MPC5553.
• Section 6.4.1.1, “Boot Configuration” 1st paragraph. Changed “where to read the reset configuration word” to “where to read
the reset configuration halfword (RCHW)”,
• Incorporated comments:
• MPC5553 Only: Changed the reset value of the drive strength control (DSC) field from 0b11 to 0b00 for PCR72 and
PCR73 registers. See section Section 6.3.1.12.33, “MPC5553: Pad Configuration Register 72 (SIU_PCR72).
• Ta ble 6 -34 , Tabl e 6 -3 6, Ta bl e 6 -3 7 Changed PA fields for PCR registers 62, 68, and 69 to a 2-bit PA field and deleted the
other rows.
• Ta ble 6 -1 SIU Signal Properties: changed IRQ
[0:15] to MPC5553 IRQ[0:5, 7:15]
• Added text to Section 6.2.1.6, “External Interrupt Request Input Pins (IRQ[0:15])”
Table 6-55. Changes to MPC5553/5554 RM for Rev. 5.0 Release
Description of Change
In Section 6.3.1.12, “Pad Configuration Registers (SIU_PCR), for the SIU_PCR105 register, rephrased footnote 1 to the
following:
“When configured as PCSB[0], the OBE bit has no effect. When configured as PCSD[2], set the OBE bit to 1 for master
operation, and clear it to 0 for slave operation. When configured as GPO, set the OBE bit to 1.”
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