Freescale Semiconductor MPC5553 - Transmitter

MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
Freescale Semiconductor 21-21
21.4.4 Transmitter
Figure 21-13 illustrates the features of the eSCI transmitter.
Figure 21-13. eSCI Transmitter Block Diagram
Table 21-17. Baud Rates (Example: System Clock = 128 Mhz)
Bits
SBR[0:12]
Receiver
Clock (Hz)
Transmitter
Clock (Hz)
Targ et B aud
Rate
Error
(%)
0x0023 3,657,143 228,571 230,400 –0.79
0x0045 1,855,072 115,942 115,200 +0.64
0x008B 920,863 57,554 57,600 –0.01
0x00D0 615,385 38,462 38,400 +0.16
0x01A1 306,954 19,185 19,200 –0.08
0x022C 230,216 14,388 14,400 –0.08
0x0341 153,661 9,604 9600 +.04
0x0683 76,785 4,799 4800 –0.02
0x0D05 38,404 2,400.2 2400 +.01
0x1A0A 19,202 1,200.1 1200 +.01
SCI baud rate
System clock
16 ESCIx_CR1[SBR]
-------------------------------------------------------------=
M
TXD
÷16
H 8 7 6 5 4 3 2 1 0 L
11-bit Transmit Shift Register
STOP START
MSB
BAUD Divider
Bus
Clock
SBR0–SBR12
SBK
Parity
Generation
PE
PT
Load from
ESCIx_DR
Shift
Enable
Preamble
(All 1s)
Break
(All 0s)
Transmitter Control
T8
TE
TIE
TDRE
LOOP Control
TDRE
Interrupt
Request
TCIE
TC
TC
Interrupt
Request
RSRC
LOOPS
To
Internal Bus
eSCI Data Registers
RXD