MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
1-18 Freescale Semiconductor
processing subsystem. The MPC5553 has one eTPU engine. High-level assembler/compiler and
documentation allows customers to develop their own functions on the eTPU. The eTPU supports several
features of older TPU versions, making it easy to port older applications.
1.5.15 eQADC
The enhanced queued analog to digital converter (eQADC) module provides accurate and fast conversions
for a wide range of applications. The eQADC provides a parallel interface to two on-chip analog to digital
converters (ADCs), and a single master-to-single slave serial interface to an off-chip external device. The
two on-chip ADCs are architected to allow access to all the analog channels.
The eQADC transfers commands from multiple command FIFOs (CFIFOs) to the on-chip ADCs or to the
external device. The module can also receive data from the on-chip ADCs or from an off-chip external
device into multiple result FIFOs (RFIFOs) in parallel, independently of the CFIFOs. The eQADC
supports software and external hardware triggers from other modules to initiate transfers of commands
from the CFIFOs to the on-chip ADCs or to the external device. It also monitors the fullness of CFIFOs
and RFIFOs, and accordingly generates eDMA or interrupt requests to control data movement between the
FIFOs and the system memory, which is external to the eQADC.
1.5.16 DSPI
The deserial serial peripheral interface (DSPI) module provides a synchronous serial interface for
communication between the MCU and external devices. The DSPI supports pin count reduction through
serialization and deserialization of eTPU channels, eMIOS channels and memory-mapped registers. The
channels and register content are transmitted using a SPI-like protocol. There are four identical DSPI
modules (DSPI_A, DSPI_B, DSPI_C, and DSPI_D) on the MPC5554 MCU. The MPC5553 has three
DSPI modules (DSPI_B, DSPI_C, and DSPI_D).
The DSPIs have three configurations:
• Serial peripheral interface (SPI) configuration where the DSPI operates as a SPI with support for
queues
• Deserial serial interface (DSI) configuration where the DSPI serializes eTPU and eMIOS output
channels and deserializes the received data by placing it on the eTPU and eMIOS input channels
• Combined serial interface (CSI) configuration where the DSPI operates in both SPI and DSI
configurations interleaving DSI frames with SPI frames, giving priority to SPI frames
For queued operations, the SPI queues reside in system memory external to the DSPI. Data transfers
between the memory and the DSPI FIFOs are accomplished through the use of the eDMA controller or
through host software.
1.5.17 eSCI
The enhanced serial communications interface (eSCI) allows asynchronous serial communications with
peripheral devices and other MCUs. It includes special support to interface to local interconnect network
(LIN) slave devices.
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