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Freescale Semiconductor MPC5553 - Interrupts

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MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
Freescale Semiconductor 16-15
4. Execute code
The BAM waits for the last eSCI message transmission to complete and then the eSCI is disabled.
TXD_A and RXD_A revert to general-purpose inputs. The BAM switches execution to the
downloaded code by branching to the first address in which code was stored, as specified in step 2
of the protocol.
NOTE
The code that is downloaded and executed must periodically refresh the
e200z6 watchdog timer or change the timeout period to a value that does not
cause resets during normal operation.
16.3.3 Interrupts
No interrupts are generated by or are enabled by the BAM.
16.4 Revision History
Table 16-12. eSCI Serial Boot Mode Download Protocol
Protocol
Step
Host Sent Message
BAM Response
Message
Action
1 64-bit password MSB first 64-bit password Password checked for validity and compared against
stored password. e200z6 watchdog timer is
refreshed if the password check is successful
2 32-bit store address +
32-bit number of bytes
MSB first
32-bit store address
+ 32-bit number of bytes
Load address and size of download are stored for
future use
3 8 bits of raw binary data 8 bits of raw binary data Each byte of data received is store in MCU memory,
starting at the address specified in the previous step
and incrementing until the amount of data received
and stored, matched the size as specified in the
previous step.
4 None None
The BAM returns I/O pins and the eSCI module to
their reset state, with the exception that
ESCI_A_CR2[MDIS] is asserted rather than
negated. Then it branches to the first address the
data was stored to (as specified in step 2)
Table 16-13. Changes to MPC5553/5554 for Rev. 4 Release
Description of Change
Added footnote: “Signal enabled for MPC5554” to BB, BR, BG, TSIZ signals in External Bus Interface Configuration table.
Added Table 16-7 “BAM CAN Frequency at Reset (FMPLL Enabled out of Reset) to Serial Boot Mode CAN and eSCI
Configuration section.

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