Freescale Semiconductor MPC5553 - Ethernet Receive Buffer Descriptor (Rxbd)

MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
Freescale Semiconductor 14-49
finds the E bit = 0, it will poll this BD once more. If the BD = 0 a second time the FEC will stop reading
receive BDs until the driver writes to RDAR.
14.5.2 Ethernet Receive Buffer Descriptor (RxBD)
In the RxBD, the user initializes the E and W bits in the first word and the pointer in second word. When
the buffer has been DMA’d, the Ethernet controller will modify the E, L, M, BC, MC, LG, NO, CR, OV,
and TR bits and write the length of the used portion of the buffer in the first word. The M, BC, MC, LG,
NO, CR, OV and TR bits in the first word of the buffer descriptor are only modified by the Ethernet
controller when the L bit is set.
.
0 1 2 3456 7 8 91011121314 15
Offset + 0 E RO1 W RO2 L — — M BC MC LG NO — CR OV TR
Offset + 2 Data Length
Offset + 4 Tx Data Buffer Pointer - A [0:15]
Offset + 6 Tx Data Buffer Pointer - A [16:31]
Figure 14-28. Receive Buffer Descriptor (RxBD)
Table 14-37. Receive Buffer Descriptor Field Definitions
Halfword Location Field Name Description
Offset + 0 Bit 0 E Empty. Written by the FEC (=0) and user (=1).
0 The data buffer associated with this BD has been filled with
received data, or data reception has been aborted due to an
error condition. The status and length fields have been
updated as required.
1 The data buffer associated with this BD is empty, or
reception is currently in progress.
Offset + 0 Bit 1 RO1 Receive software ownership.
This field is reserved for use by software. This read/write bit will
not be modified by hardware, nor will its value affect hardware.
Offset + 0 Bit 2 W Wrap. Written by user.
0 The next buffer descriptor is found in the consecutive
location
1 The next buffer descriptor is found at the location defined in
ERDSR.
Offset + 0 Bit 3 RO2 Receive software ownership.
This field is reserved for use by software. This read/write bit will
not be modified by hardware, nor will its value affect hardware.
Offset + 0 Bit 4 L Last in frame. Written by the FEC.
0 The buffer is not the last in a frame.
1 The buffer is the last in a frame.
Offset + 0 Bits 5-6 — Reserved.