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Freescale Semiconductor MPC5553 - Flexcan

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MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
Freescale Semiconductor 1-19
1.5.18 FlexCAN
The MCU contains three (MPC5554) or two (MPC5553) controller area network (FlexCAN) modules.
Each FlexCAN module is a communication controller implementing the CAN protocol according to CAN
Specification version 2.0B. The CAN protocol was designed to be used primarily as a vehicle serial data
bus, meeting the specific requirements of this field: real-time processing, reliable operation in the EMI
environment of a vehicle, cost-effectiveness and required bandwidth. Each FlexCAN module contains 64
message buffers (MB).
1.5.19 NDI
The Nexus development interface (NDI) module provides real-time development support capabilities for
the MPC5500 family’s MCU built on the Power Architecture in compliance with the IEEE-ISTO
5001-2003 standard. This development support is supplied for MCUs without requiring external address
and data pins for internal visibility. The NDI module is an integration of several individual Nexus modules
that are selected to provide the development support interface for the MPC5500 family. The NDI module
interfaces to the host processor, to one or dual eTPU processors, and internal buses to provide development
support as per the IEEE-ISTO 5001-2003 standard. The development support provided includes
program trace, data trace, watchpoint trace, ownership trace, run-time access to the MCU’s internal
memory map, and access to the Power Architecture and eTPU internal registers during halt, via the
auxiliary port. The Nexus interface also supports a JTAG only mode using only the JTAG pins.
1.5.20 JTAGC
The JTAG controller (JTAGC) module provides the means to test chip functionality and connectivity while
remaining transparent to system logic when not in test mode. Testing is performed via a boundary scan
technique, as defined in the IEEE 1149.1-2001 standard. All data input to and output from the JTAGC
module is communicated in serial format. The JTAGC module is compliant with the IEEE 1149.1-2001
standard.
1.5.21 FEC (MPC5553 Only)
The fast Ethernet controller (FEC) of the MPC5553 supports several standard MAC-PHY interfaces to
connect to an external Ethernet transceiver:
10/100 Mbps MII interface
10 Mbps 7-Wire interface that uses a subset of the MII pins
Built-in FIFO and DMA controller
Fully software compatible to the FEC module of Freescale's industry standard PowerQUICC
communications controller
•IEEE 802.3 MAC (compliant with IEEE 802.3 1998 edition)
Built-in FIFO and DMA controller
Support for different Ethernet physical interfaces:
100 Mbps IEEE 802.3 MII
10 Mbps IEEE 802.3 MII

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