Freescale Semiconductor MPC5553 - Delay Settings

MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
20-66 Freescale Semiconductor
20.5.3 Delay Settings
Table 20-32 shows the values for the delay after transfer (t
DT
) and CS to SCK delay (t
CSC
) that can be
generated based on the prescaler values and the scaler values set in the DSPIx_CTARs. The values
calculated assume a 100 MHz system frequency.
Table 20-31. Baud Rate Values
Baud Rate Divider Prescaler Values
(DSPI_CTAR[PBR])
2357
Baud Rate Scaler Values (DSPI_CTAR[BR])
2
25.0 MHz 16.7 MHz 10.0 MHz 7.14 MHz
4
12.5 MHz 8.33 MHz 5.00 MHz 3.57 MHz
6
8.33 MHz 5.56 MHz 3.33 MHz 2.38 MHz
8
6.25 MHz 4.17 MHz 2.50 MHz 1.79 MHz
16
3.12 MHz 2.08 MHz 1.25 MHz 893 kHz
32
1.56 MHz 1.04 MHz 625 kHz 446 kHz
64
781 kHz 52 1kHz 312 kHz 223 kHz
128
391 kHz 260 kHz 156 kHz 112 kHz
256
195 kHz 130 kHz 78.1 kHz 55.8 kHz
512
97.7 kHz 65.1 kHz 39.1 kHz 27.9 kHz
1024
48.8 kHz 32.6 kHz 19.5 kHz 14.0 kHz
2048
24.4 kHz 16.3 kHz 9.77 kHz 6.98 kHz
4096
12.2 kHz 8.14 kHz 4.88 kHz 3.49 kHz
8192
6.10 kHz 4.07 kHz 2.44 kHz 1.74 kHz
16384
3.05 kHz 2.04 kHz 1.22 kHz 872 Hz
32768
1.53 kHz 1.02 kHz 610 Hz 436 Hz