Freescale Semiconductor MPC5553 - Clock Configuration

MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
Freescale Semiconductor 11-25
11.4.2.6.3 Loss-of-Clock Interrupt Request
When a loss of clock condition is recognized, the FMPLL will request an interrupt if the
FMPLL_SYNCR[LOCIRQ] bit is set. The LOCIRQ bit has no effect in bypass mode or if
FMPLL_SYNCR[LOCEN] = 0.
11.4.3 Clock Configuration
In crystal reference and external reference clock mode, the default system frequency is determined by the
MFD, RFD, and PREDIV reset values. See Section 11.3.1.1, “Synthesizer Control Register
(FMPLL_SYNCR).” The frequency multiplier is determined by the RFD, PREDIV, and multiplication
frequency divisor (MFD) bits in FMPLL_SYNCR.
Table 11-10 shows the clock-out to clock-in frequency relationships for the possible clock modes.
When programming the FMPLL, be sure not to violate the maximum system clocks frequency or max/min
ICO frequency specifications. For determining the MFD value, RFD should be assumed zero (that is,
divide by 1). This will insure that the FMPLL does not have to synthesize a frequency out of its range. See
the MPC5553 Microcontroller Data Sheet and the MPC5554 Microcontroller Data Sheet for more
information.
11.4.3.1 Programming System Clock Frequency Without Frequency Modulation
The following steps are required to accommodate the frequency overshoot that may occur when the
PREDIV or MFD bits are changed. If frequency modulation is going to be enabled, the maximum
allowable frequency must be reduced by the programmed F
m
.
Table 11-10. Clock-out vs. Clock-in Relationships
Clock Mode PLL Option
Crystal Reference Mode
External Reference Mode
Dual Controller (1:1) Mode
Bypass Mode
NOTES:
F
sys
= system frequency
F
prediv
= clock frequency after PREDIV.
F
ref_crystal
and F
ref_ext
= clock frequencies at the EXTAL_EXTCLK signal. (See Figure 11-1)
MFD ranges from 0 to 31
RFD ranges from 0 to 7
PREDIV normal reset value is 0. Caution: Programming a PREDIV value such that the ICO operates
outside its specified range will cause unpredictable results and the FMPLL will not lock. Refer to the
MPC5553 Microcontroller Data Sheet and MPC5554 Microcontroller Data Sheet for details on the
ICO range.
F
sys
= F
ref_crystal
•
(MFD + 4)
((PREDIV + 1) 

2
RFD
)
F
sys
= F
ref_ext
•
(MFD + 4)
((PREDIV + 1) 

2
RFD
)
F
sys
= 2F
ref_1:1
F
sys
= F
ref_ext