Freescale Semiconductor MPC5553 - User Initialization (Prior to Asserting ECR[ETHER_EN])

MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
Freescale Semiconductor 14-35
14.4.2 User Initialization (Prior to Asserting ECR[ETHER_EN])
The user needs to initialize portions of the FEC prior to setting the ECR[ETHER_EN] bit. The exact values
will depend on the particular application. The sequence is not important.
Ethernet MAC registers requiring initialization are defined in Table 14-30.
FEC FIFO/DMA registers that require initialization are defined in Table 14-31.
Table 14-29. ECR[ETHER_EN] De-Assertion Effect on FEC
Register/Machine Reset Value
XMIT block Transmission is aborted (bad CRC
appended)
RECV block Receive activity is aborted
DMA block All DMA activity is terminated
RDAR Cleared
TDAR Cleared
Descriptor Controller block Halt operation
Table 14-30. User Initialization (Before ECR[ETHER_EN])
Description
Initialize EIMR
Clear EIR (write 0xFFFF_FFFF)
TFWR (optional)
IALR / IAUR
GAUR / GALR
PALR / PAUR (only needed for full-duplex flow control)
OPD (only needed for full-duplex flow control)
RCR
TCR
MSCR (optional)
Clear MIB_RAM (locations Base + 0x0200 – 0x02FC)
Table 14-31. FEC User Initialization (Before ECR[ETHER_EN])
Description
Initialize FRSR (optional)
Initialize EMRBR
Initialize ERDSR
Initialize ETDSR
Initialize (Empty) Transmit Descriptor ring
Initialize (Empty) Receive Descriptor ring