Freescale Semiconductor MPC5553 - Table of Contents

MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
Freescale Semiconductor 9-41
eMIOS_GFR_F1 21 EMIOS.GFR[F1] eMIOS channel 1 Flag
eMIOS_GFR_F2 22 EMIOS.GFR[F2] eMIOS channel 2 Flag
eMIOS_GFR_F3 23 EMIOS.GFR[F3] eMIOS channel 3 Flag
eMIOS_GFR_F4 24 EMIOS.GFR[F4] eMIOS channel 4 Flag
eMIOS_GFR_F8 25 EMIOS.GFR[F8] eMIOS channel 8 Flag
eMIOS_GFR_F9 26 EMIOS.GFR[F9] eMIOS channel 9 Flag
eTPU_CDTRSR_A_DTRS0 27 ETPU.CDTRSR_A[DTRS0] eTPUA Channel 0 Data Transfer
Request Status
eTPU_CDTRSR_A_DTRS1 28 ETPU.CDTRSR_A[DTRS1] eTPUA Channel 1 Data Transfer
Request Status
eTPU_CDTRSR_A_DTRS2 29 ETPU.CDTRSR_A[DTRS2] eTPUA Channel 2 Data Transfer
Request Status
eTPU_CDTRSR_A_DTRS14 30 ETPU.CDTRSR_A[DTRS14] eTPUA Channel 14 Data Transfer
Request Status
eTPU_CDTRSR_A_DTRS15 31 ETPU.CDTRSR_A[DTRS15] eTPUA Channel 15 Data Transfer
Request Status
The Below Requests Are Only Available in the MPC5554
DSPIA_SR_TFFF 32 DSPIAISR[TFFF] DSPIA Transmit FIFO Fill Flag
DSPIA_SR_RFDF 33 DSPIA.SR[RFDF] DSPIA Receive FIFO Drain Flag
eSCIB_COMBTX 34 ESCIB.SR[TDRE] ||
ESCIB.SR[TC] ||
ESCIB.SR[TXRDY]
eSCIB combined DMA request of the
Transmit Data Register Empty and LIN
Transmit Data Ready DMA requests
eSCIB_COMBRX 35 ESCIB.SR[RDRF] ||
ESCIB.SR[RXRDY]
eSCIB combined DMA request of the
Receive Data Register Full and LIN
Receive Data Ready DMA requests
eMIOS_GFR_F6 36 EMIOS.GFR[F6] eMIOS channel 6 Flag
eMIOS_GFR_F7 37 EMIOS.GFR[F7] eMIOS channel 7 Flag
eMIOS_GFR_F10 38 EMIOS.GFR[F10] eMIOS channel 10 Flag
eMIOS_GFR_F11 39 EMIOS.GFR[F11] eMIOS channel 11 Flag
eMIOS_GFR_F16 40 EMIOS.GFR[F16] eMIOS channel 16 Flag
eMIOS_GFR_F17 41 EMIOS.GFR[F17] eMIOS channel 17 Flag
eMIOS_GFR_F18 42 EMIOS.GFR[F18] eMIOS channel 18 Flag
eMIOS_GFR_F19 43 EMIOS.GFR[F19] eMIOS channel 19 Flag
eTPU_CDTRSR_A_DTRS12 44 ETPU.CDTRSR_A[DTRS12] eTPUA Channel 12 Data Transfer
Request Status
eTPU_CDTRSR_A_DTRS13 45 ETPU.CDTRSR_A[DTRS13] eTPUA Channel 13 Data Transfer
Request Status
Table 9-22. DMA Request Summary for eDMA (Continued)
DMA Request Channel Source Description