Freescale Semiconductor MPC5553 - Register Description

MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
17-8 Freescale Semiconductor
17.3.1 Register Description
All registers are 32-bit wide. This section illustrates the eMIOS with 24 unified channels supporting 24-bit
wide data.
17.3.1.1 eMIOS Module Configuration Register (EMIOS_MCR)
EMIOS_MCR contains global control bits for the eMIOS module.
Base + 0x02E0 UC22 Unified Channel 22 Registers 256
Base + 0x0300 UC23 Unified Channel 23 Registers 256
Table 17-5. UC Memory Map
Address Register Name Register Description Size (bits)
UCn Base + 0x0000 EMIOS_CADRn Channel A Data Register 32
UCn Base + 0x0004 EMIOS_CBDRn Channel B Data Register 32
UCn Base + 0x0008 EMIOS_CCNTRn Channel Counter Register 32
UCn Base + 0x000C EMIOS_CCRn Channel Control Register 32
UCn Base + 0x0010 EMIOS_CSRn Channel Status Register 32
UCn Base + 0x0014–
UCn Base + 0x001F
— Reserved —
0 1 2 3 4 5 6 7 8 9 101112131415
R 0 MDIS FRZ GTBE ETB GPREN 0 0 0 0 0 0 SRV
W
Reset0 0000 0 0000000000
Reg Addr Base + 0x0000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R GPRE 00000000
W
Reset0 0000 0 0000000000
Reg Addr Base + 0x0000
Figure 17-2. eMIOS Module Configuration Register (EMIOS_MCR)
Table 17-4. eMIOS Memory Map (Continued)
Address Register Name Register Description Size (bits)