MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
Freescale Semiconductor 25-37
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RACRW SZ MAP PR BST00000
W
Reset0000000000000000
Nexus Reg 0x7
1514131211109876543210
R CNT ERR DV
W
Reset0000000000000000
Nexus Reg 0x7
Figure 25-16. Read/Write Access Control/Status Register (RWCS)
Table 25-28. RWCS Field Description
Bits Name Description
31 AC Access control.
0 End access
1 Start access
30 RW Read/write select.
0 Read access
1 Write access
29–27 SZ
[2:0]
Word size.
000 8-bit (byte)
001 6-bit (halfword)
010 32-bit (word)
011 64-bit (doubleword - only in burst mode)
100–111 Reserved (default to word)
26–24 MAP
[2:0]
MAP select.
000 Primary memory map
001-111 Reserved
23–22 PR
[1:0]
Read/write access priority.
00 Lowest access priority
01 Reserved (default to lowest priority)
10 Reserved (default to lowest priority)
11 Highest access priority
21 BST Burst control.
0 Module accesses are single bus cycle at a time.
1 Module accesses are performed as burst operation.
20–16 — Reserved.
15–2 CNT
[13:0]
Access control count. Number of accesses of word size SZ
1 ERR Read/write access error. See Table 25-29.
0 DV Read/write access data valid. See Table 25-29.
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