Freescale Semiconductor MPC5553 - Page 24

MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
Freescale Semiconductor 1-3
Figure 1-1. MPC5554 Block Diagram
Unified 32-Kbyte
Interrupt Controller
DSPI
eSCI
FlexCAN
eQADC
Crossbar Switch (XBAR)
Peripheral Bridge B (PBRIDGE_B)
Peripheral Bridge A (PBRIDGE_A)
Master
Master
Master
SlaveSlaveSlaveSlave
Cache
Multiply
Unit
Load/Store Unit
Branch
Instruction
Unit
e200z6 Core
Nexus
LEGEND
JTAG
Exception
Handler
eTPU
32
channel
3K Data
RAM
16K Code
RAM
eMIOS
24
channel
DSPI DSPI DSPI
eSCI
FlexCAN FlexCAN
Flash
2 Mbyte
eDMA
64
channels
AMUX
ADC
ADCi
ADC
External Bus Interface
Slave
Nexus
Interface
External
Master
Interface
eTPU
32
channel
System/Bus
Integration
Boot
Assist
Module
MPC5500 Device Module Acronyms
CAN – Controller area network (FlexCAN)
DSPI – Deserial/serial peripheral interface
eDMA – Enhanced direct memory access
eMIOS – Enhanced modular I/O system
eQADC – Enhanced queued analog/digital converter
eSCI – Enhanced serial communications interface
eTPU – Enhanced time processing units
FMPLL – Frequency modulated phase-locked loop
SRAM – Static RAM
e200z6 Core Component Acronyms
DEC – Decrementer
FIT – Fixed interval timer
TB – Time base
WDT – Watchdog timer
Prediction Unit
Signal
Processing
Engine
64-bit General
Purpose
Registers
Special
Purpose
Registers
Integer
Execution
Unit
SRAM
64 Kbyte
Memory
Management
Unit
Core Timers
Unit
(FIT, TB, DEC)
FMPLL
1.5V
Regulator
Control