System Interface Unit (SIU)
MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
6-70 Freescale Semiconductor
Figure 6-84. ETPUA[14]_PCSB[4]_GPIO[128] Pad Configuration Register (SIU_PCR128)
Refer to Table 6-16 for bit field definitions.
6.3.1.12.73 Pad Configuration Register 129 (SIU_PCR129)
The SIU_PCR129 register controls the pin function, direction, and static electrical attributes of the
ETPUA[15]_PCSB[5]_GPIO[129] pin.
Figure 6-85. ETPUA[15]_PCSB[5]_GPIO[129] Pad Configuration Register (SIU_PCR129)
Refer to Table 6-16 for bit field definitions.
Address: Base + 0x0140 Access: Read / write[4:7, 10:15]
0123456789101112131415
R 0000
PA OBE
1
1
When configured as PCS, the OBE bit has no effect. The OBE bit must be set to 1 for both ETPUA or GPIO when configured
as outputs.
IBE
2
2
The IBE bit must be set to 1 for ETPUA or GPIO when configured as inputs. When configured as PCS, ETPUA, or GPO
outputs, set the IBE bit to 1 to reflect the pin state in the corresponding GPDI register.
00
ODE HYS SRC WPE WPS
W
RESET: 000000000000001U
3
3
The weak pullup/down selection at reset for the ETPUA[14] pin is determined by the WKPCFG pin.
Address: Base + 0x0142 Access: Read / write[4:7, 10:15]
0123456789101112131415
R 0000
PA OBE
1
1
When configured as PCS, the OBE bit has no effect. The OBE bit must be set to 1 for ETPUA or GPIO when configured as
outputs.
IBE
2
2
The IBE bit must be set to 1 for ETPUA or GPIO when configured as inputs. When configured as PCS, ETPUA, or GPO
outputs, set the IBE bit to 1 to reflect the pin state in the corresponding GPDI register.
00
ODE HYS SRC WPE WPS
W
RESET: 000000000000001U
3
3
The weak pullup/down selection at reset for the ETPUA[15] pin is determined by the WKPCFG pin.