System Interface Unit (SIU)
MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
Freescale Semiconductor 6-85
6.3.1.12.100 Pad Configuration Register 209 (SIU_PCR209)
The SIU_PCR209 register controls the pin function, direction, and static electrical attributes of the
PLLCFG[1]_IRQ[5]_SOUTD_GPIO[209] pins.
Figure 6-112. PLLCFG[1]_IRQ[5]_SOUTD_GPIO[209] Pad Configuration Register (SIU_PCR209)
Refer to Table 6-16 for bit field definitions.
6.3.1.12.101 Pad Configuration Register 210 (SIU_PCR210)
The SIU_PCR210 register controls the pin function, direction, and static electrical attributes of the
RSTCFG_GPIO[210] pin.
Figure 6-113. RSTCFG_GPIO[210] Pad Configuration Register (SIU_PCR210)
Refer to Table 6-16 for bit field definitions.
Address: Base + 0x01E2 Access: Read / write[3:7, 10:15]
0123456789101112131415
R 000
PA
1
1
The PLLCFG function applies only when the RSTCFG pin is asserted during reset. Set the PA field to 0b010 for IRQ[5], 0b100
for SOUTD, and 0b000 for GPIO[209].
OBE
2
2
When configured as IRQ, the OBE bit has no effect. When configured as GPO, set the OBE bit to 1.
IBE
3
3
When configured as IRQ or GPO, set the IBE bit to 1 to reflect the pin state in the corresponding GPDI register. Clear the IBE
to 0 to reduce power consumption. When configured as GPI, set the IBE bit to 1.
00
ODE HYS
4
4
When configured as IRQ, set the HYS bit to 1.
SRC WPE WPS
W
RESET: 0000110000010011
Address: Base + 0x01E4 Access: Read / write[5:7, 10:15]
0123456789101112131415
R 00000
PA
1
1
RSTCFG function is applicable during reset only. The PA bit must be cleared to 0 for GPIO operation.
OBE
2
2
When configured as GPO, set the OBE bit to 1.
IBE
3
3
When configured as GPO, set the IBE bit to 1 to reflect the pin state in the corresponding GPDI register. When configured as
GPI, set the IBE bit to 1.
00
ODE HYS SRC WPE WPS
W
RESET: 0000010000010011
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