System Interface Unit (SIU)
MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
6-104 Freescale Semiconductor
6.3.1.21 Compare A Low Register (SIU_CARL)
The SIU_CARL register holds the 32-bit value that is compared against the value in the SIU_CBRL
register. The CMPAL field is read/write and is reset by the synchronous reset signal.
6.3.1.22 Compare B High Register (SIU_CBRH)
The SIU_CBRH holds the 32-bit value that is compared against the value in the SIU_CARH. The CMPBH
field is read/write and is reset by the synchronous reset signal.
Address: Base + 0x098C Access: Read / write[0:31]
0123456789101112131415
R
CMPAL
W
Reset
0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
CMPAL
W
Reset
0000000000000000
Figure 6-138. Compare A Low Register (SIU_CARL)
Address: Base + 0x0990 Access: Read / write[0:31]
0123456789101112131415
R
CMPBH
W
Reset
0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
CMPBH
W
Reset
0000000000000000
Figure 6-139. Compare B High Register (SIU_CBRH)
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