MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
Freescale Semiconductor 25-49
25.11.12.2.7 BTM Overflow Error Messages
An error message occurs when a new message cannot be queued due to the message queue being full. The
FIFO will discard incoming messages until it has completely emptied the queue. After it is emptied, an
error message will be queued. The error encoding will indicate which types of messages attempted to be
queued while the FIFO was being emptied.
If only a program trace message attempts to enter the queue while it is being emptied, the error message
will incorporate the program trace only error encoding (00001). If both OTM and program trace messages
attempt to enter the queue, the error message will incorporate the OTM and program trace error encoding
(00111). If a watchpoint also attempts to be queued while the FIFO is being emptied, then the error
message will incorporate error encoding (01000).
NOTE
The OVC bits within the DC1 register can be set to delay the CPU in order
to alleviate (but not eliminate) potential overrun situations.
Error information is messaged out in the following format
:
Figure 25-33. Error Message Format
25.11.12.2.8 Program Trace Synchronization Messages
A program trace direct/indirect branch with sync message is messaged via the auxiliary port (provided
program trace is enabled) for the following conditions (see Table 25-35):
• Initial program trace message upon the first direct/indirect branch after exit from system reset or
whenever program trace is enabled
• Upon direct/indirect branch after returning from a CPU low power state
• Upon direct/indirect branch after returning from debug mode
• Upon direct/indirect branch after occurrence of queue overrun (can be caused by any trace
message), provided program trace is enabled
• Upon direct/indirect branch after the periodic program trace counter has expired indicating 255
without-sync program trace messages have occurred since the last with-sync message occurred
• Upon direct/indirect branch after assertion of the event in (EVTI) pin if the EIC bits within the DC1
register have enabled this feature
• Upon direct/indirect branch after the sequential instruction counter has expired indicating 255
instructions have occurred between branches
• Upon direct/indirect branch after a BTM message was lost due to an attempted access to a secure
memory location.
• Upon direct/indirect branch after a BTM message was lost due to a collision entering the FIFO
between the BTM message and either a watchpoint message or an ownership trace message
If the NZ6C3 module is enabled at reset, a EVTI assertion initiates a program trace direct/indirect branch
with sync message (if program trace is enabled) upon the first direct/indirect branch. The format for
program trace direct/indirect branch with sync messages is as follows:
ECODE (00001 / 00111 / 01000)
msb lsb
12
SRC TCODE (001000)
3
6 bits4 bits5 bits
Fixed length = 15 bits
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