MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
Freescale Semiconductor 25-79
25.14.2.7 Breakpoint / Watchpoint Control Register 2 (BWC2)
Breakpoint/watchpoint control register2 controls attributes for generation of nxdm watchpoint #2.
17–16 BWR1 Breakpoint/watchpoint #1 register compare
00 No register compare (same as BWC1[31:30] = 2’b00)
01 Reserved
10 Compare with BWA1 value
11 Reserved
15 BWT1 Breakpoint/watchpoint #1 type
0Reserved
1 Watchpoint #1 on data accesses
14–0 – Reserved, read as 0.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RBWE2 BRW2 0000000000 BWR2
W
Reset0 000000000000000
1514131211109876543210
RBWT2000000000000000
W
Reset0 000000000000000
Figure 25-60. Break / Watchpoint Control Register 2 (BWC2)
Table 25-52. BWC2 Field Description
Bit Name Description
31–30 BWE2 Breakpoint/watchpoint #2 enable
00Internal Nexus watchpoint #2 disabled
01-10 Reserved
11 Internal Nexus watchpoint #2 enabled
29–28 BRW2 Breakpoint/watchpoint #2 read/write select
00 Watchpoint #2 hit on read accesses
01 Watchpoint #2 hit on write accesses
10 Watchpoint #2 on read or write accesses
11 Reserved
27–18 – Reserved, read as 0.
17–16 BWR2 Breakpoint/watchpoint #2 register compare
00 No register compare (same as BWC1[31:30] = 2’b00)
01 Reserved
10 Compare with BWA2 value
11 Reserved
Table 25-51. BWC1 Field Description (Continued)
Bit Name Description
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