System Interface Unit (SIU)
MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
6-76 Freescale Semiconductor
6.3.1.12.84 MPC5554: Pad Configuration Register 147–162 (SIU_PCR147–SIU_PCR162)
NOTE
The MPC5553 does not implement PCR146–178. These registers are
reserved in the MPC5553.
The SIU_PCR147–SIU_PCR162 registers control the pin function, direction, and static electrical
attributes of the ETPUB[0:15]_ETPUB[16:31]_GPIO[147:162] pins. Both the input and output channels
of ETPUB[0:15] are connected to these pins and only the output channels of ETPUB[16:31] are connected
to these pins.
Figure 6-96. MPC5554: ETPUB[0:15]_ETPUB[16:31]_GPIO[147:162]
Pad Configuration Register (SIU_PCR147–SIU_PCR162)
Refer to Table 6-16 for bit field definitions.
6.3.1.12.85 MPC5554: Pad Configuration Register 163 (SIU_PCR163)
NOTE
The MPC5553 does not implement PCR163. This register is reserved in the
MPC5553.
The SIU_PCR163 register controls the pin function, direction, and static electrical attributes of the
ETPUB[16]_PCSA[1]_GPIO[163] pin. Both the input and output channel of ETPUB[16] are connected
to the pin.
Address: Base + 0x0166 through Base + 0x0184 Access: Read / write[4:7, 10:15]
0123456789101112131415
R 0000
PA OBE
1
1
The OBE bit must be set to 1 for both ETPUB[0:15] and GPIO[147:162] when configured as outputs. When configured as
ETPUB[16:31], the OBE bit has no effect.
IBE
2
2
When configured as ETPUB or GPO, set the IBE bit to 1 to reflect the pin state in the corresponding GPDI register. Clear the
IBE to 0 to reduce power consumption. The IBE bit must be set to 1 for both ETPUB[0:15] and GPIO[147:162] when configured
as inputs.
00
ODE HYS SRC WPE WPS
W
RESET: 000000000000001U
3
3
The weak pullup/down selection at reset for the ETPUB[0:15] pins is determined by the WKPCFG pin.
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