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MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
9-38 Freescale Semiconductor
processing is executed: for example, interrupts, major loop channel linking, and scatter/gather operations,
if enabled.
Figure 9-25 shows how each DMA request initiates one minor loop transfer (iteration) without CPU
intervention. DMA arbitration can occur after each minor loop, and one level of minor loop DMA
preemption is allowed. The number of minor loops in a major loop is specified by the beginning iteration
count (biter).
Figure 9-25. Example of Multiple Loop Iterations
Table 9-21. TCD Primary Control and Status Fields
TCD Field
Name
Description
START Control bit to explicitly start channel when using a software
initiated DMA service (Automatically cleared by hardware)
ACTIVE Status bit indicating the channel is currently in execution
DONE Status bit indicating major loop completion (Cleared by software
when using a software initiated DMA service)
D_REQ Control bit to disable DMA request at end of major loop
completion when using a hardware-initiated DMA service
BWC Control bits for “throttling” bandwidth control of a channel
E_SG Control bit to enable scatter-gather feature
INT_HALF Control bit to enable interrupt when major loop is half complete
INT_MAJ Control bit to enable interrupt when major loop completes
DMA Request
Minor Loop 3
Current Major Loop
Iteration Count
(CITER)
Example Memory Array
DMA Request
Minor Loop 2
DMA Request
Minor Loop 1
Major Loop

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