MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
Freescale Semiconductor 14-15
14.3.4.2.4 Transmit Descriptor Active Register (TDAR)
The TDAR is a command register that should be written by the user to indicate that the transmit descriptor
ring has been updated (transmit buffers have been produced by the driver with the ready bit set in the buffer
descriptor).
Whenever the register is written, the X_DES_ACTIVE bit is set. This value is independent of the data
actually written by the user. When set, the FEC will poll the transmit descriptor ring and process transmit
frames (provided ECR[ETHER_EN] is also set). After the FEC polls a transmit descriptor whose ready bit
is not set, then the FEC will clear X_DES_ACTIVE and cease transmit descriptor ring polling until the
user sets the bit again, signifying additional descriptors have been placed into the transmit descriptor ring.
The TDAR register is cleared at reset, when ECR[ETHER_EN] is cleared, or when ECR[RESET] is set.
0 1 2 3 4 5 6 7 8 9101112131415
R 0 0 0 0 0 0 0 R_DES_ACTIVE 0 0 0 0 0 0 0 0
W
Reset0 0 0 0000 0 0 000 00 0 0
Address Base + 0x0010
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R0 0 0 0000 0 0 000 00 0 0
W
Reset0 0 0 0000 0 0 000 00 0 0
Address Base + 0x0010
Figure 14-5. Receive Descriptor Active Register (RDAR)
Table 14-7. RDAR Field Descriptions
Bits Name Description
0–6 — Reserved, should be cleared.
7 R_DES_ACTIVE Set to one when this register is written, regardless of the value written. Cleared by
the FEC device whenever no additional “empty” descriptors remain in the receive
ring. Also cleared when ECR[ETHER_EN] is cleared.
8–31 — Reserved, should be cleared.
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