Lenze i550

Asseron level "HIGH acve" or "LOW acve"
The digital inputs can be congured in 0x2630:001 (P410.01) HIGH acve (default seng) or
LOW acve:
HIGH acve (default seng) LOW acve
•
Internally, the digital input terminals are set to LOW level via pull-
down resistors.
•
The current ows from the current supply (e.g. X3/24V) through the
contact to the digital input terminal (and internally via the pull-down
resistor to GND).
•
If the contact is closed, the digital input is set to HIGH level and is thus
HIGH acve.
•
Internally, the digital input terminals are set to HIGH level via pull-up
resistors.
•
The current ows from the digital input terminal through the contact
to GND.
•
If the contact is closed, the digital input is set to LOW level and is thus
LOW acve.
Connecon plan (example): Connecon plan (example):
GND AI1 AI2 AO1
10V 24V DI1 DI2 DI3 DI4 DI5 DO1
X3
S1 S2 S3
GND AI1 AI2 AO1
10V 24V DI1 DI2 DI3 DI4 DI5 DO1
X3
S1 S2 S3
Debounce me
For minimising interference pulses, a debounce me of 1 ms is set for all digital inputs.
Via »EASY Starter« (or network), the debounce me for can be increased individually for each
digital input to maximally 50 ms.
Inversion
Each digital input can be congured in such a way that the status pending at the terminal is
internally inverted logically. This way, a closed contact, for instance, serves to deacvate an
assigned funcon instead of acvang it. Thus, the control of the inverter can be exibly
adapted to the requirements of the actual applicaon.
Parameter
Address Name / seng range / [default seng] Info
0x2630:001
(P410.01)
Sengs for digital inputs: Asseron level
(DI sengs: Asseron level)
Denion of the internal hardware interconnecon of the digital input
terminal (X3/DIx).
0 LOW acve Digital input terminals (X3/DIx) are set to HIGH level via pull-up resistors.
1 HIGH acve Digital input terminals (X3/DIx) are set to LOW level via pull-down resis-
tors.
0x2630:002
(P410.02)
Sengs for digital inputs: Input funcon
(DI sengs: Input funcon)
Input funcon of the digital terminals DI3 and DI4.
0 Digital input DI3 = digital input
DI4 = digital input
1 HTL encoder >= 512 increments (from
version 02.00)
DI3 = HTL input for encoder track A
DI4 = HTL input for encoder track B
4HTL encoder^ 162
2 Pulse train (from version 03.00) DI3 = digital input
DI4 = HTL input for pulse train
4Congure digital inputs DI3/DI4 for detecng a pulse train^ 247
3 Pulse train/direcon (from version 03.00) DI3 = HTL input for direcon specicaon; HIGH level = counter-clock-
wise (CCW)
DI4 = HTL input for pulse train
4Congure digital inputs DI3/DI4 for detecng a pulse train^ 247
4 HTL encoder < 128 increments (from
version 05.03)
For low-resoluon encoders (<= 128 increments)
The procedure is suitable for encoders with a poor signal quality, e.g. for
rotary transducers with a high error rate in the scan rao and phase
shi.
•
This method requires equidistant period lengths per encoder incre-
ment.
•
EMC-compliant wiring (e.g. motor und encoder cable shielding) is
required!
I/O extensions and control connecons
Congure digital inputs
244