MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
Freescale Semiconductor 22-19
012345678 9101112131415
R000000000 0 000000
W
Reset000000000 0 000000
Reg Addr Base + 0x0020
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
RBIT1
ERR
BIT0
ERR
ACK
ERR
CRC
ERR
FRM
ERR
STF
ERR
TX
WRN
RX
WRN
IDLE TXRX FLTCONF 0 BOFF
INT
ERR
INT
0
W
w1c w1c
Reset000000000 0 000000
Reg Addr Base + 0x0020
Figure 22-8. Error and Status Register (CANx_ESR)
Table 22-11. CANx_ESR Field Descriptions
Bits Name Description
0–15 — Reserved.
16 BIT1ERR Bit 1 error. Indicates when an inconsistency occurs between the transmitted and the
received message in a bit. A read clears BIT1ERR.
0 No such occurrence
1 At least one bit sent as recessive is received as dominant
Note: This bit is not set by a transmitter in case of arbitration field or ACK slot, or in case
of a node sending a passive error flag that detects dominant bits.
17 BIT0ERR Bit 0 error. Indicates when an inconsistency occurs between the transmitted and the
received message in a bit. A read clears BIT0ERR.
0 No such occurrence
1 At least one bit sent as dominant is received as recessive
18 ACKERR Acknowledge error. Indicates that an acknowledge error has been detected by the
transmitter node; that is, a dominant bit has not been detected during the ACK SLOT. A
read clears ACKERR.
0 No such occurrence
1 An ACK error occurred since last read of this register
19 CRCERR Cyclic redundancy code error. Indicates that a CRC error has been detected by the
receiver node; that is, the calculated CRC is different from the received. A read clears
CRCERR.
0 No such occurrence
1 A CRC error occurred since last read of this register.
20 FRMERR Form error. Indicates that a form error has been detected by the receiver node; that is, a
fixed-form bit field contains at least one illegal bit. A read clears FRMERR.
0 No such occurrence
1 A form error occurred since last read of this register
21 STFERR Stuffing error. Indicates that a stuffing error has been detected. A read clears STFERR.
0 No such occurrence.
1 A stuffing error occurred since last read of this register.
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