Freescale Semiconductor MPC5553 - Page 1160

MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
Freescale Semiconductor A-31
eTPU A channel 28 host service request register ETPU_C28HSRR_A 32-bit Base + 0x05C8
Reserved — — Base + (0x05CC-0x05CF)
eTPU A channel 29 configuration register ETPU_C29CR_A 32-bit Base + 0x05D0
eTPU A channel 29 status and control register ETPU_C29SCR_A 32-bit Base + 0x05D4
eTPU A channel 29 host service request register ETPU_C29HSRR_A 32-bit Base + 0x05D8
Reserved — — Base + (0x05DC-0x05DF)
eTPU A channel 30 configuration register ETPU_C30CR_A 32-bit Base + 0x05E0
eTPU A channel 30 status and control register ETPU_C30SCR_A 32-bit Base + 0x05E4
eTPU A channel 30 host service request register ETPU_C30HSRR_A 32-bit Base + 0x05E8
Reserved — — Base + (0x05EC-0x05EF)
eTPU A channel 31 configuration register ETPU_C31CR_A 32-bit Base + 0x05F0
eTPU A channel 31 status and control register ETPU_C31SCR_A 32-bit Base + 0x05F4
eTPU A channel 31 host service request register ETPU_C31HSRR_A 32-bit Base + 0x05F8
Reserved — — Base + (0x05FC-0x07FF)
eTPU B channel 0 configuration register
2
ETPU_C0CR_B
2
32-bit Base + 0x0800
eTPU B channel 0 status and control register
2
ETPU_C0SCR_B
2
32-bit Base + 0x0804
eTPU B channel 0 host service request register
2
ETPU_C0HSRR_B
2
32-bit Base + 0x0808
Reserved — — Base + (0x080C-0x080F)
eTPU B channel 1 configuration register
2
ETPU_C1CR_B
2
32-bit Base + 0x0810
eTPU B channel 1 status and control register
2
ETPU_C1SCR_B
2
32-bit Base + 0x0814
eTPU B channel 1 host service request register
2
ETPU_C1HSRR_B
2
32-bit Base + 0x0818
Reserved — — Base + (0x081C-0x081F)
eTPU B channel 2 configuration register
2
ETPU_C2CR_B
2
32-bit Base + 0x0820
eTPU B channel 2 status and control register
2
ETPU_C2SCR_B
2
32-bit Base + 0x0824
eTPU B channel 2 host service request register
2
ETPU_C2HSRR_B
2
32-bit Base + 0x0828
Reserved — — Base + (0x082C-0x082F)
eTPU B channel 3 configuration register
2
ETPU_C3CR_B
2
32-bit Base + 0x0830
eTPU B channel 3 status and control register
2
ETPU_C3SCR_B
2
32-bit Base + 0x0834
eTPU B channel 3 host service request register
2
ETPU_C3HSRR_B
2
32-bit Base + 0x0838
Reserved — — Base + (0x083C-0x083F)
eTPU B channel 4 configuration register
2
ETPU_C4CR_B
2
32-bit Base + 0x0840
eTPU B channel 4 status and control register
2
ETPU_C4SCR_B
2
32-bit Base + 0x0844
Table A-2. MPC5554 / MPC5553 Detailed Register Map (Continued)
Register Description Register Name
Used
Size
Address Reference