Freescale Semiconductor MPC5553 - Page 206

System Interface Unit (SIU)
MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
Freescale Semiconductor 6-27
6.3.1.12.7 MPC5553: Pad Configuration Register 45 (SIU_PCR45)
The SIU_PCR45 register controls the pin function, direction, and static electrical attributes of the
DATA[17]_FEC_CRS_CAL_DATA[1]_GPIO[45] pin.
Figure 6-20. MPC5553: DATA[17]_FEC_CRS_CAL_DATA[1]_GPIO[45]
Pad Configuration Register (SIU_PCR45)
Refer to Table 6-16 for bit field definitions.
Address: Base + 0x009A Access: Read / write[3:11, 14:15]
0123456789101112131415
R 000
PA
1
1
CAL_DATA[1] is for calibration only.
OBE
2
2
When configured as DATA[17], FEC_CRS, or CAL_DATA[1], the OBE bit has no effect. When configured as GPO, set the OBE
bit to 1.
IBE
3
3
When configured as DATA[17], FEC_CRS, CAL_DATA[1], or GPO, set the IBE bit to 1 to reflect the pin state in the corresponding
GPDI register. Clear the IBE to 0 to reduce power consumption. When configured as GPI, set the IBE bit to 1.
DSC ODE
4
4
When configured as DATA[17] or CAL_DATA[1], clear the ODE bit to 0.
HYS
5
5
If external master operation is enabled, clear the HYS bit to 0.
00
WPE
6
6
Refer to the EBI section for weak pullup settings when configured as DATA[17] or CAL_DATA[1].
WPS
6
W
RESET: 000000001100001 1
Table 6-19. PCR45 PA Field Definition
PA Field Pin Function
0b000 GPIO[45]
0b001 DATA[17]
0b010 FEC_CRS
0b011 Reserved
0b100 CAL_DATA[1]
1
1
For calibration only.