System Interface Unit (SIU)
MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
Freescale Semiconductor 6-33
6.3.1.12.13 MPC5553: Pad Configuration Register 51 (SIU_PCR51)
The SIU_PCR51 register controls the pin function, direction, and static electrical attributes of the
DATA[23]_FEC_TXD[3]_CAL_DATA[7]_GPIO[51] pin.
Figure 6-26. MPC5553: DATA[23]_FEC_TXD[3]_CAL_DATA[7]_GPIO[51]
Pad Configuration Register (SIU_PCR51)
Refer to Table 6-16 for bit field definitions.
Address: Base + 0x00A6 Access: Read / write[3:11, 14:15]
0123456789101112131415
R 000
PA
1
1
CAL_DATA[7] is for calibration only.
OBE
2
2
When configured as DATA[23], FEC_TXD[3], or CAL_DATA[7], the OBE bit has no effect. When configured as GPO, set the OBE
bit to 1.
IBE
3
3
When configured as DATA[23], FEC_TXD[3], CAL_DATA[7], or GPO, set the IBE bit to 1 to reflect the pin state in the
corresponding GPDI register. Clear the IBE to 0 to reduce power consumption. When configured as GPI, set the IBE bit to 1.
DSC ODE
4
4
When configured as DATA[23] or CAL_DATA[7], clear the ODE bit to 0.
HYS
5
5
If external master operation is enabled, clear the HYS bit to 0.
00
WPE
6
6
Refer to the EBI section for weak pullup settings when configured as DATA[23] or CAL_DATA[7].
WPS
6
W
RESET: 000000001100001 1
Table 6-25. PCR51 PA Field Definition
PA Field Pin Function
0b000 GPIO[51]
0b001 DATA[23]
0b010 FEC_TXD[3]
0b011 Reserved
0b100 CAL_DATA[7]
1
1
For calibration only.
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