System Interface Unit (SIU)
MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
6-54 Freescale Semiconductor
6.3.1.12.40 Pad Configuration Register 84 (SIU_PCR84)
The SIU_PCR84 register controls the pin function, direction, and static electrical attributes of the
CNRXA_GPIO[84] pin.
Figure 6-52. CNRXA_GPIO[84] Pad Configuration Register (SIU_PCR84)
Refer to Table 6-16 for bit field definitions.
6.3.1.12.41 Pad Configuration Register 85 (SIU_PCR85)
The SIU_PCR85 register controls the pin function, direction, and static electrical attributes of the
CNTXB_PCSC[3]_GPIO[85] pin. The CNTXB function is not available in the MPC5553 (this register
allows selection of the PCSC[3] and GPIO functions).
Figure 6-53. CNTXB_PCSC[3]_GPIO[85] Pad Configuration Register (SIU_PCR85)
Refer to Table 6-16 for bit field definitions.
Address: Base + 0x00E8 Access: Read / write[5:7, 10:15]
0123456789101112131415
R 00000
PA OBE
1
1
When configured as CNRXA, the OBE bit has no effect. When configured as GPO, set the OBE bit to 1.
IBE
2
2
When configured as CNRXA or GPO, set the IBE bit to 1 to reflect the pin state in the corresponding GPDI register. Clear the
IBE to 0 to reduce power consumption. When configured as GPI, set the IBE bit to 1.
00
ODE HYS SRC WPE WPS
W
RESET: 0000000000000011
Address: Base + 0x00EA Access: Read / write[4:7, 10:15]
0123456789101112131415
R 0000
PA
1
1
The CNTXB function is not available on the MPC5553. Do not select 0b01 or 0b11 for the PA field.
OBE
2
2
When configured as CNTXB (MPC5554 only) or PCS, the OBE bit has no effect. When configured as GPO, set the OBE bit to
1.
IBE
3
3
When configured as CNTXB (MPC5554 only) or PCS or GPO, set the IBE bit to 1 to reflect the pin state in the corresponding
GPDI register. Clear the IBE to 0 to reduce power consumption. When configured as GPI, set the IBE bit to 1.
00
ODE HYS SRC WPE WPS
W
RESET: 0000000000000011
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