MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
13-12 Freescale Semiconductor
Figure 13-5. PEG Valid Times
13.3.2.1.1 MCR Simultaneous Register Writes
A number of MCR bits are protected against write when another bit or set of bits is in a specific state. These
write locks are covered on a bit by bit basis in Section 13.3.2.1, “Module Configuration Register
(FLASH_MCR).” The write locks detailed in that section do not consider the effects of trying to write two
or more bits simultaneously. The effects of writing bits simultaneously which would put the flash module
in an illegal state are detailed here.
The flash does not allow the user to write bits simultaneously which would put the device into an illegal
state. This is implemented through a priority mechanism among the bits. The bit changing priorities are
detailed in Table 13-7.
If the user attempts to write two or more MCR bits simultaneously then only the bit with the highest
priority level will be written. Setting two bits with the same priority level is prevented by existing write
locks and will not put the flash in an illegal state.
For example, setting FLASH_MCR[STOP] and FLASH_MCR[PGM] simultaneously results in only
FLASH_MCR[STOP] being set. Attempting to clear FLASH_MCR[EHV] while setting
FLASH_MCR[PSUS] will result in FLASH_MCR[EHV] being cleared, while FLASH_MCR[PSUS] will
remain unaffected.
13.3.2.2 Low-/Mid-Address Space Block Locking Register (FLASH_LMLR)
The low- and mid-address block locking register provides a means to protect blocks from being modified.
These bits along with bits in the secondary LMLOCK field (FLASH_SLMLR), determine if the block is
locked from program or erase. An “OR”’ of FLASH_LMLR and FLASH_SLMLR determine the final
lock status. See Section 13.3.2.4, “Secondary Low-/Mid-Address Space Block Locking Register
(FLASH_SLMLR)” for more information on FLASH_SLMLR.
Table 13-7. MCR Bit Set/Clear Priority Levels
Priority Level MCR Bits
1STOP
2ERS
3PGM
4EHV
5 ESUS, PSUS
PEG
ABORT
VALID
PEG
VALID
PEG
VALID
PROGRAM/ERASE
FLASH_MCR[PGM/ERS]
FLASH_MCR[EHV]
FLASH_MCR[DONE]
FLASH_MCR[PEG]
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