Freescale Semiconductor MPC5553 - Page 677

MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
17-38 Freescale Semiconductor
Figure 17-26. Quadrature Decode Mode Example with Count and Direction Encoder
Figure 17-27. Quadrature Decode Mode Example with Phase_A and Phase_B Encoder
17.4.4.4.10 Windowed Programmable Time Accumulation Mode (WPTA)
The WPTA mode accumulates the sum of the total high time or low time of an input signal over a
programmable interval (time window).
The prescaler bits UCPRE[0:1] in EMIOS_CCRn define the increment rate of the internal counter.
Register A1 holds the start time and register B1 holds the stop time of the programmable time interval.
When a match occurs between register A and the selected timebase, the internal counter is cleared and it
Direction
(from UCn)
Count
(from UC[n-1])
EMIOS_CCNTRn
inc/dec
A1 Write
(Value 1)
A1 Match A1 Match
+1 +1 +1 +1 +1 +1 +1 +1 –1 –1 –1 –1 –1
EMIOS_CCNTRn
Value 1
0x000000
FLAG
Set Event
Note: Writing EMIOS_CADRn writes to A1.
MODE[6] = 0
EDPOL = 1
Time
Phase A
(from UCn)
Phase B
(from UC[n-1])
EMIOS_CCNTRn
inc/dec
A1 Write
(Value 1) A1 Match A1 Match
+1
EMIOS_CCNTRn
Value 1
0x000000
FLAG
Set Event
Note: Writing EMIOS_CADRn writes to A1.
MODE[6] = 1
Time
-1-1-1-1-1-1+1 +1+1+1+1+1+1 -1 +1+1 +1+1+1+1+1+1 -1-1-1-1-1-1 -1 +1 +1+1+1+1+1+1
Value 2
A1 Match A1 Match A1 Match
A1 Write
(Value 2)