Freescale Semiconductor MPC5553 - Page 745

MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
18-38 Freescale Semiconductor
18.4.2.3.7 eTPU Channel Pending Service Status Register (ETPU_CPSSR)
ETPU_CPSSR is a read-only register that holds the status of the pending channel service requests. For
information on channel service requests, refer to the eTPU reference manual.
NOTE
More than one source may be requesting service when a channel’s service
request bit is set.
NOTE
The pending service status bit for a channel is set when a service request is
pending, even if the Channel is disabled (CPRn =0).
Table 18-21. ETPU_CDTRER Field Descriptions
Bits Name Description
0–31 DTREn Channel n data transfer request enable. Enable data transfer requests for their respective
channels.
0 Data transfer request disabled for channel n.
1 Data transfer request enabled for channel n.
For details about interrupts refer to the eTPU reference manual.
0123456789101112131415
R SR31 SR30 SR29 SR28 SR27 SR26 SR25 SR24 SR23 SR22 SR21 SR20 SR19 SR18 SR17 SR16
W
Reset0000000000000000
Reg Addr eTPU A: Base + 0x0_0280 / eTPU B: Base + 0x0_0284
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R SR15 SR14 SR13 SR12 SR11 SR10 SR9 SR8 SR7 SR6 SR5 SR4 SR3 SR2 SR1 SR0
W
Reset0000000000000000
Reg Addr eTPU A: Base + 0x0_0280 / eTPU B: Base + 0x0_0284
Figure 18-20. eTPU Channel Pending Service Status Register (ETPU_CPSSR)
Table 18-22. ETPU_CPSSR Bit Field Descriptions
Bits Name Description
0–31 SRn Pending service request n. Indicates a pending service request for channel n. The SR
status for the pending request is negated at the time slot transition for the respective
service thread.
0 no service request pending for channel n
1 pending service request for channel n