MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
Freescale Semiconductor 19-11
Base + 0x0078 EQADC_FISR2 eQADC FIFO and interrupt status register 2 32
Base + 0x007C EQADC_FISR3 eQADC FIFO and interrupt status register 3 32
Base + 0x0080 EQADC_FISR4 eQADC FIFO and interrupt status register 4 32
Base + 0x0084 EQADC_FISR5 eQADC FIFO and interrupt status register 5 32
Base + 0x0088
— Reserved —
Base + 0x008C — Reserved —
Base + 0x0090 EQADC_CFTCR0 eQADC command FIFO transfer counter register 0 16
Base + 0x0092 EQADC_CFTCR1 eQADC command FIFO transfer counter register 1 16
Base + 0x0094 EQADC_CFTCR2 eQADC command FIFO transfer counter register 2 16
Base + 0x0096 EQADC_CFTCR3 eQADC command FIFO transfer counter register 3 16
Base + 0x0098 EQADC_CFTCR4 eQADC command FIFO transfer counter register 4 16
Base + 0x009A EQADC_CFTCR5 eQADC command FIFO transfer counter register 5 16
Base + 0x009C — Reserved —
Base + 0x00A0 EQADC_CFSSR0 eQADC command FIFO status snapshot register 0 32
Base + 0x00A4 EQADC_CFSSR1 eQADC command FIFO status snapshot register 1 32
Base + 0x00A8 EQADC_CFSSR2 eQADC command FIFO status snapshot register 2 32
Base + 0x00AC EQADC_CFSR eQADC command FIFO status register 32
Base + 0x00B0 — Reserved —
Base + 0x00B4 EQADC_SSICR eQADC synchronous serial interface control register 32
Base + 0x00B8 EQADC_SSIRDR eQADC synchronous serial interface receive data
register
32
Base + 0x00BC–
Base + 0x00FC
— Reserved —
Base + 0x0100–
Base + 0x010C
EQADC_CF0Rn eQADC CFIFO0 registers 0–3 32
Base + 0x0110–
Base + 0x013C
— Reserved —
Base + 0x0140–
Base + 0x014C
EQADC_CF1Rn eQADC CFIFO1 registers 0–3 32
Base + 0x0150–
Base + 0x017C
— Reserved —
Base + 0x0180–
Base + 0x018C
EQADC_CF2Rn eQADC CFIFO2 registers 0–3 32
Base + 0x0190–
Base + 0x01BC
— Reserved —
Table 19-2. eQADC Memory Map (Continued)
Address Register Name Register Description Size (bits)