Freescale Semiconductor MPC5553 - Page 765

MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
19-10 Freescale Semiconductor
Base + 0x000C EQADC_ETDFR eQADC external trigger digital filter register 32
Base + 0x0010 EQADC_CFPR0 eQADC command FIFO push register 0 32
Base + 0x0014 EQADC_CFPR1 eQADC command FIFO push register 1 32
Base + 0x0018 EQADC_CFPR2 eQADC command FIFO push register 2 32
Base + 0x001C EQADC_CFPR3 eQADC command FIFO push register 3 32
Base + 0x0020 EQADC_CFPR4 eQADC command FIFO push register 4 32
Base + 0x0024 EQADC_CFPR5 eQADC command FIFO push register 5 32
Base + 0x0028
— Reserved —
Base + 0x002C — Reserved —
Base + 0x0030 EQADC_RFPR0 eQADC result FIFO pop register 0 32
Base + 0x0034 EQADC_RFPR1 eQADC result FIFO pop register 1 32
Base + 0x0038 EQADC_RFPR2 eQADC result FIFO pop register 2 32
Base + 0x003C EQADC_RFPR3 eQADC result FIFO pop register 3 32
Base + 0x0040 EQADC_RFPR4 eQADC result FIFO pop register 4 32
Base + 0x0044 EQADC_RFPR5 eQADC result FIFO pop register 5 32
Base + 0x0048 — Reserved —
Base + 0x004C — Reserved —
Base + 0x0050 EQADC_CFCR0 eQADC command FIFO control register 0 16
Base + 0x0052 EQADC_CFCR1 eQADC command FIFO control register 1 16
Base + 0x0054 EQADC_CFCR2 eQADC command FIFO control register 2 16
Base + 0x0056 EQADC_CFCR3 eQADC command FIFO control register 3 16
Base + 0x0058 EQADC_CFCR4 eQADC command FIFO control register 4 16
Base + 0x005A EQADC_CFCR5 eQADC command FIFO control register 5 16
Base + 0x005C
— Reserved —
Base + 0x0060 EQADC_IDCR0 eQADC interrupt and eDMA control register 0 16
Base + 0x0062 EQADC_IDCR1 eQADC interrupt and eDMA control register 1 16
Base + 0x0064 EQADC_IDCR2 eQADC interrupt and eDMA control register 2 16
Base + 0x0066 EQADC_IDCR3 eQADC interrupt and eDMA control register 3 16
Base + 0x0068 EQADC_IDCR4 eQADC interrupt and eDMA control register 4 16
Base + 0x006A EQADC_IDCR5 eQADC interrupt and eDMA control register 5 16
Base + 0x006C
— Reserved —
Base + 0x0070 EQADC_FISR0 eQADC FIFO and interrupt status register 0 32
Base + 0x0074 EQADC_FISR1 eQADC FIFO and interrupt status register 1 32
Table 19-2. eQADC Memory Map (Continued)
Address Register Name Register Description Size (bits)