MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
19-12 Freescale Semiconductor
Base + 0x01C0–
Base + 0x01CC
EQADC_CF3Rn eQADC CFIFO3 registers 0–3 32
Base + 0x01D0–
Base + 0x01FC
— Reserved —
Base + 0x0200–
Base + 0x020C
EQADC_CF4Rn eQADC CFIFO4 registers 0–3 32
Base + 0x0210–
Base + 0x023C
— Reserved —
Base + 0x0240–
Base + 0x024C
EQADC_CF5Rn eQADC CFIFO5 registers 0–3 32
Base + 0x0250–
Base + 0x02FC
— Reserved —
Base + 0x0300–
Base + 0x030C
EQADC_RF0Rn eQADC RFIFO0 registers 0–3 32
Base + 0x0310–
Base + 0x033C
— Reserved —
Base + 0x0340–
Base + 0x034C
EQADC_RF1Rn eQADC RFIFO1 registers 0–3 32
Base + 0x0350–
Base + 0x37C
— Reserved —
Base + 0x380–
Base + 0x038C
EQADC_RF2Rn eQADC RFIFO2 registers 0–3 32
Base + 0x0390–
Base + 0x03BC
— Reserved —
Base + 0x03C0–
Base + 0x03CC
EQADC_RF3Rn eQADC RFIFO3 registers 0–3 32
Base + 0x03D0–
Base + 0x03FC
— Reserved —
Base + 0x0400–
Base + 0x040C
EQADC_RF4Rn eQADC RFIFO4 registers 0–3 32
Base + 0x0410–
Base + 0x043C
— Reserved —
Base + 0x0440–
Base + 0x044C
EQADC_RF5Rn eQADC RFIFO5 registers 0–3 32
Base + 0x0450–
Base + 0x07FC
— Reserved —
Table 19-2. eQADC Memory Map (Continued)
Address Register Name Register Description Size (bits)