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MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
21-8 Freescale Semiconductor
6 BRK13 Break transmit character length. Determines whether the transmit break character is 10/11
or 13/14 bits long. The detection of a framing error is not affected by this bit.
0 Break Character is 10 or 11 bits long
1 Break character is 13 or 14 bits long
Note: LIN 2.0 now requires that a break character is always 13 bits long, so this bit should
always be set to 1. The eSCI will work with BRK13=0, but it will violate LIN 2.0.
7 Reserved. This bit is readable/writable, but has no effect on the operation of the eSCI
module.
8 BESM13 Bit error sample mode, bit 13. Determines when to sample the incoming bit in order to
detect a bit error. (This is only relevant when FBR is set.)
0 Sample at RT clock 9
1 Sample at RT clock 13 (see Section 21.4.5.3, “Data Sampling”)
9 SBSTP SCI bit error stop. Stops the SCI when a bit error is asserted. This allows to stop driving
the LIN bus quickly after a bit error has been detected.
0 Byte is completely transmitted
1 Byte is partially transmitted
10–11 Reserved.
12 ORIE Overrun error interrupt enable. Generates an interrupt, when a frame error is detected. For
a list of interrupt enables and flags, see Table 21-21.
13 NFIE Noise flag interrupt enable. Generates an interrupt, when noise flag is set. For a list of
interrupt enables and flags, see Table 21-21.
14 FEIE Frame error interrupt enable. Generates an interrupt, when a frame error is detected. For
a list of interrupt enables and flags, see Table 21-21.
15 PFIE Parity flag interrupt enable. Generates an interrupt, when parity flag is set. For a list of
interrupt enables and flags, see Table 21-21.
Table 21-4. ESCIx_CR2 Field Description (Continued)
Bits Name Description
Break Length:
ESCIx_CR1[M]
01
BRK13
010 11
113 14

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