RM0091 Interrupts and events
Doc ID 018940 Rev 1 165/742
Note: The external wakeup lines are edge triggered. No glitches must be generated on these
lines. If a rising edge on an external interrupt line occurs during a write operation to the
EXTI_FTSR register, the pending bit is not set.
Rising and falling edge triggers can be set for the same interrupt line. In this case, both
generate a trigger condition.
11.3.5 Software interrupt event register (EXTI_SWIER)
Address offset: 0x10
Reset value: 0x0000 0000
11.3.6 Pending register (EXTI_PR)
Address offset: 0x14
Reset value: undefined
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
SWIER
19
Res.
SWIER
17
SWIER
16
rw rw rw
1514131211109 87654321 0
SWIER
15
SWIER
14
SWIER
13
SWIER
12
SWIER
11
SWIER
10
SWIER
9
SWIER
8
SWIER
7
SWIER
6
SWIER
5
SWIER
4
SWIER
3
SWIER
2
SWIER
1
SWIER
0
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:20 Reserved, must be kept at reset value.
Bits 19 SWIER19: Software interrupt on line 19
Writing a 1 to this bit when it is at 0 sets PR19 pending bit in EXTI_PR. If the
interrupt is enabled on this line on the EXTI_IMR and EXTI_EMR, an interrupt
request is generated.
This bit is cleared by clearing the corresponding bit of EXTI_PR (by writing a 1
into the bit).
Bits 18 Reserved, must be kept at reset value.
Bits 17:0 SWIERx: Software interrupt on line x (x = 17 to 0)
Writing a 1 to this bit when it is at 0 sets the corresponding pending bit in
EXTI_PR. If the interrupt is enabled on this line on the EXTI_IMR and
EXTI_EMR, an interrupt request is generated.
This bit is cleared by clearing the corresponding bit of EXTI_PR (by writing a 1
into the bit).
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. PR19 Res. PR17 PR16
rc_w1 rc_w1 rc_w1
1514131211109 87654321 0
PR15 PR14 PR13 PR12 PR11 PR10 PR9 PR8 PR7 PR6 PR5 PR4 PR3 PR2 PR1 PR0
rc_w1 rc_w1 rc_w1 rc_w1 rc_w1 rc_w1 rc_w1 rc_w1 rc_w1 rc_w1 rc_w1 rc_w1 rc_w1 rc_w1 rc_w1 rc_w1