STMicroelectronics STM32F05 series User Manual

RM0091 Reset and clock control (RCC)
Doc ID 018940 Rev 1 101/742
7.4.5 APB1 peripheral reset register (RCC_APB1RSTR)
Address offset: 0x10
Reset value: 0x0000 0000
Access: no wait state, word, half-word and byte access
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res
CECR
ST
DAC
RST
PWR
RST
Res Res Res Res Res
I2C2
RST
I2C1
RST
Res Res Res
USART
2
RST
Res
rw rw rw rw rw rw
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Res
SPI2
RST
Res Res
WWD
GRST
Res Res
TIM14
RST
Res Res Res
TIM6
RST
Res Res
TIM3
RST
TIM2
RST
rw rw rw rw rw rw
Bit 31 Reserved, must be kept at reset value.
Bit 30 CECRST HDMI CEC reset
Set and cleared by software.
0: No effect
1: Reset HDMI CEC
Bit 29 DACRST: DAC interface reset
Set and cleared by software.
0: No effect
1: Reset DAC interface
Bit 28 PWRRST: Power interface reset
Set and cleared by software.
0: No effect
1: Reset power interface
Bits 27:23 Reserved, must be kept at reset value.
Bit 22 I2C2RST: I2C2 reset
Set and cleared by software.
0: No effect
1: Reset I2C2
Bit 21 I2C1RST: I2C1 reset
Set and cleared by software.
0: No effect
1: Reset I2C1
Bits 20:18 Reserved.
Bit 17 USART2RST: USART2 reset
Set and cleared by software.
0: No effect
1: Reset USART2
Bits 16:15 Reserved, must be kept at reset value.

STMicroelectronics STM32F05 series Specifications

General

Brand	STMicroelectronics
Model	STM32F05 series
Category	Microcontrollers
Language	English